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Original question:

PGA305: PGA305

PGA305: PGA305 EEPROM

Francisco Requena
Intellectual 410 points
Part Number: PGA305

Hi 

In the PGA305 datasheet is stated, step 1 on the following procedure:
"7.3.16.1.2 EEPROM Programming Procedure
For programming the EEPROM, the EEPROM is organized in 16 pages of eight bytes each. Write to the 8-byte
EEPROM cache to program the EEPROM memory cells. Select the EEPROM memory page to transfer the
contents of the EEPROM cache.
1. Write the upper four bits of the 7-bit EEPROM address to the EEPROM_PAGE_ADDRESS register to select
the EEPROM page."

Where can I find the EEPROM memory pages as per those instructions above? 
The table 20 displays the Control and Status Registers but the addresses are 4 bytes long and there is not way to correlate this table with what is described on step 1. 

could I assume that step one is not accurate and use the less significant Byte instead?
the Cache needs 4 Bits <3:0>, can i use the most significant four Bits of these byte to create the pages?
Please advice.

  • 0
    TI__Mastermind 31655 points
    Hi Francisco,

    Please give me a day to check a couple of things, and I will get back to you on this tomorrow.

    Regards,
  • 0 in reply to Scott Cummins
    TI__Mastermind 31655 points
    Hi Francisco,

    I deleted my last post to avoid confusion because it did not have entirely correct information.

    In order to write to the EEPROM, you must use the EEPROM cache as described in the datasheet section you have included above. As you have correctly pointed out, the EEPROM pages are not properly supplied in the datasheet, and step one is not entirely correct. This is something I will fix with an update to the documentation.

    In the meantime you can determine the page of each EEPROM byte by using the EEPROM address in the register map. The EEPROM is arranged into 16 pages of 8 bytes each addressed from 0x0 through 0xF, and the EEPROM memory space starts at 0x40000000. So 0x40000000 through 0x40000007 are on page 0x0.

    As an example, BRDG_CTRL is listed with an EEPROM address of 0x40000034. This is an offset of 52 (decimal) from 0x40000000. That places this register on page 0x6, with an offset of 0x4 bytes.

    Regards,
  • 0 in reply to Scott Cummins
    Intellectual 410 points

    Hi Scott

    As I can't use the DI interface to address certain EEPROM addresses to configure this PGA305, Id like to ask: what is the procedure to write to only one EEPROM  address?. The issue is that there are Gaps in the memory table map of this document and the procedure requires me to write the entire Cache memory before attempting to write the EEPROM. Example the TEMP_SE register address 0x4000003A, it doent have any description of the surrounding registers, I mean  0x40000038, 0x40000039 , TEMP_SE, 0x4000003B. I'd like to know what registers are affected before i write them. A work around could be: reading these registers before writing them back, but that is driving blind.

    TEMP_SE N/A N/A 0x4000003A RW

    Please advice 

  • 0 in reply to Francisco Requena
    TI__Guru**** 174851 points
    Hi Francisco,

    I'm really sorry for the delay here. Scott is out for the upcoming Holiday season, he'll get back to you when he returns to the office.
  • 0
    Intellectual 410 points
    Thanks
     
    Francisco Requena
    DOWNHOLE TECHNOLOGY
    Mobile: +1 (432) 312-8647
    7414 Breen Dr, Houston TX 77086