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AWR1243: Cascade Control Protocol

Part Number: AWR1243

I am working on a cascade board with an external hardware trigger. I was looking at the Radar Interface Document for information on the order for the cascade device API SB calls and was wondering if the slaves wait for the hardware trigger after the AWR_FRAMESTARTSOP_CONF_SB is issued by all of the slave devices or at some other point? 

I am trying to operate all chips through a single SPI bus and want to make sure I can do that with no significant delays between triggers.

Thanks!