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AWR1642BOOST: External Clock Implementation: Will a 10 MHz external clock frequency function properly as an external clock input to the AWR? Or is 40 MHz necessary?

Part Number: AWR1642BOOST
Other Parts Discussed in Thread: AWR1642

Hi, 

I am currently working with three AWR1642's in a network (multistatic mode). Right now, they are hardware synchronized together in the network. I have worked hard to software synchronize them, but with clock drift among the radars (inaccuracy in clocks during test), I have not been able to solve this (recommendations?).

Recently, I found a possible solution through a fellow lab at MIT (called AirShare, documentation attached). In short, AirShare has two components: a clock emitter and a clock recipient. The emitter transmits two tones, f1 and f2, that are separated by the desired clock frequency. The AirShre implementation has a bandpass filter that creates a desired input clock frequency of 10 MHz. Will a 10 MHz external clock frequency function properly as an external clock input to the AWR?

On the AWR1642 device documentation, it denotes the external clock should be connected to CLKP pin at 40 MHz. Documentation below. 

Any help would be greatly appreciated... thank you!

George

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AirShare Documentation:

AirShare.pdf

TI AWR1642 Documentation on External Clock:

TI External Clock Documentation.pdf

  • Hello George,

    AWR device cannot work with 10Mhz clock, it needs a 40Mhz clock. You could use a TCXO clock source instead of the xtal , this would allow for very low ppm frequency error (< 5ppm) across temperature. This should solve the frequency error problem

    If you are looking at timing synchronization for the frames , there is a digital synchronization signal called Dig SYNCIN. If you configure the device in hardware triggered mode the frame will be aligned to the pulse edge on the SYNC IN signal. So if you use the same signal (delay matched) to trigger all the devices they would be timing synchronized.

    Regards,

    Vivek

  • Hi Vivek,

    Thank you so much for your response. It helped me with understanding that I need to have an input of 40MHz clock rather than 10 MHz.

    Can you confirm that the external clock, like the one described by AirShare, would be inputted at CLKP pin? Or somewhere else? I was slightly confused by your Dig SYNCIN comment.

    Thank you!

    George

  • Hello George,

    From the document I am not clear on the amplitude of the clock signal finally received at the wireless node and what is the "quality" of the clock in terms of jitter/phase noise. We need minimum 700 mVpp swing of the clock at the CLK P pin of our device. The phase noise requirements are also mentioned.

    Regarding the Dig SYNCIN, this is a digital signal to which the radar frame of the AWR device can be synchronized to. That will ensure the two AWr devices trigger the frame on the same signal and hence the same time.

    Regards,
    Vivek

  • Hi Vivek,

    Thank you for your response.

    I am talking to one of the authors next week about the paper and I will ask the questions you prompted in your first paragraph.

    When you talk about the Dig SYNCIN, is this digital signal hardware based (like tethering the two AWR's together with wire to provide this signal or can it be provided through software/digitally)? 

    I want to start moving the nodes around the environment so having them not tethered together with wire (which provides the Dig SYNCIN signal) will be really beneficial. 

    Any clarification would be greatly appreciated!

    George

  • Hello George,

    The dig SYNC IN signal is a physical hardware signal to be fed to a partical pin. So yes, its a wire connection provided to both the AWRs.

    If you do not want a hardware connection I am not sure if there would be any other way to synchronize them. If you can have a smaller MCU that could receive a wireless signal and provide this HW signal to the AWR device at a predictable time after it receives a command over wireless communication?

    Regards,
    Vivek