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CCS/PGA900: Firmware not booting - needing CPU restart with debugger

Part Number: PGA900
Other Parts Discussed in Thread: PGA305, PGA300, UNIFLASH, USB2ANY

Tool/software: Code Composer Studio

Hello, 

I'm developing a solution with PGA900, the firmware works ok but when I power on the board, the proccessor not run the firmware. 

The output in console is: "Cortex_M0_0: Can't Run Target CPU: (Error -1268 @ 0x1080001) Device is locked up in Hard Fault or in NMI. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.2.0.00002)"

To initialize the firmware, I need execute CPU reset with XDS200. 

How can I do the M0 proccessor to run firmware at power on?

The pga900_init.asm and startup_css.c are original files from example provided from TI.

Best Regards,

Leonardo Trinta

  • Hello Leonardo,

    The firmware will run at startup if it is programmed into the OTP. If you use the XDS200 in debug mode this is by default loading the firmware into the DEVRAM, which will be erased when the PGA900 is powered down.

    To program the firmware into the OTP space you will either have to generate a hex file through CCS that can then be programmed to the OTP through one of the digital interfaces using the EVM GUI, or you can modify the PGA900.gel file that is used with the debugger. There is a line in the gel file which determines the state of the OTP remapping to the DEVRAM, and it needs to be modified to match what is shown below:

    Config_Remap()
    {
    WR_MEM_08(REMAP_ADDR,0x00);
    }

    Regards,

  • Hi Scott, 

    Do I need apply the OTP voltage (7.6V) on OTP pin to flash through the XDSS200 and make the change on Config_Remap() function? 

    Thank you!

    Best Regards,

    Leonardo Trinta

  • Hi Leonardo,

    That is correct. For the OTP to program properly you will have to apply 7.5V to the VP_OTP pin before beginning the programming procedure. There is a jumper on the EVM for this purpose (J15) that will apply the output of the onboard 7.5V regulator to the VP_OTP pin.

    It seems like you are a decent way along in your evaluation of the PGA900, but I also recommend looking at the PGA300 or PGA305 to see if they will meet your needs. They have integrated temperature and nonlinearity compensation and do not require custom firmware. If they have the required features for your application, that could significantly speed up development. I also mention this because our ability to support firmware development requests for the PGA900 is very limited on E2E.


    Regards,

  • Hello Scott, 

    Thank you. I'll to test it and reply here. 

    PGA305 is "plug and play" on PGA900 footprint/board or requires some special attention?

    Regards,

    Leonardo Trinta

  • Hello Leonardo,

    Yes, the PGA305 is pin to pin compatible. The EVM is actually identical as well, so you could evaluate it (or the PGA300) without buying a new board.

    Regards,

  • Hi Scott,

    I tried flash the OTP memory appliyng the OTP Voltage on VP_OTP pin, but the follow error occurs:

    Cortex_M0_0: Output: **** PGA900 Initialization is in progress .......... 
    Cortex_M0_0: Output: **** PGA900 Initialization is Done ****************** 
    Cortex_M0_0: File Loader: Verification failed: Values at address 0x00000000 do not match Please verify target memory and memory map.
    Cortex_M0_0: GEL: File: D:\WORKSPACE\CCS\WO1189-4TO20MA\Debug\PGA900.out: a data verification error occurred, file load failed.

    For all purposes, the OTP_PROG_CTRL_STAT register has 0x00 value.

    Can you help-me about this? 

    Regards,

    Leonardo

  • Hi Leonardo,

    Has the OTP of this particular device been programmed before at any point? If there is a mismatch in the OTP data it will throw a verification error.

    I also recommend looking into the Uniflash tool as a way to flash the OTP to the PGA900 instead of directly through CCS. Uniflash is developed specifically for this type of application. You will need to make sure that the PGA900.gel file being used by Uniflash is the updated one that does not have the remapping set.

    Regards,

  • Hello Scott!

    No, this is a virgin device on a custom board. Just runned fw at DEVRAM memory with XDS debugger. 

    I tried with Uniflash too and the same error occurs. 

    Has a way to clear the OTP memory for the verification not occurs?

    Regards,

    Leonardo Trinta

  • Hello Scott, how are you? 

    Do you have any consideration about this? 

    I would like to add that apparently it not is a hardware issue, because the error occurrs independently of VP_OTP is applied or not. 

    With hexadecimal file, the error is: 

    Cortex_M0_0: File Loader: Verification failed: Values at address 0x00000003 do not match Please verify target memory and memory map.
    Cortex_M0_0: GEL: File: D:\WORKSPACE\CCS\WO1189-4TO20MA\Debug\PGA900.hex: a data verification error occurred, file load failed. 

     

    What does this position mean?

    I tried PGA900_LE.hex file too but the same error occurs (in 0x00000000 position). The tutorial that I follows to generate this file was found here: 

     

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    What version of the ARM compiler are you using? If you are using the latest one, it may not produce a useable hex file for the OTP. I recommend using version 5.2.6 or similar. Please see this post for instructions on adding an old compiler version: 

    Regards,

  • Hello Scott,

    I tried it but the same error occurs (but in the 0x0000000) position. I tried with Uniflash too (release version of code). 

    Can you verify my project configuration?

    (I tried the *_LE.hex file too). The same error occurs.

    Below, the output after to try flash .hex and _LE.hex file:

    Cortex_M0_0: Output: **** PGA900 Initialization is in progress ..........
    Cortex_M0_0: Output: **** PGA900 Initialization is Done ******************
    Cortex_M0_0: File Loader: Verification failed: Values at address 0x00000000 do not match Please verify target memory and memory map.
    Cortex_M0_0: GEL: File: D:\WORKSPACE\CCS\WO1111-4TO20MA\Release\WO1111-4TO20MA.hex: a data verification error occurred, file load failed.
    Cortex_M0_0: File Loader: Verification failed: Values at address 0x00000000 do not match Please verify target memory and memory map.
    Cortex_M0_0: GEL: File: D:\WORKSPACE\CCS\WO1111-4TO20MA\Release\WO1111-4TO20MA_LE.hex: a data verification error occurred, file load failed.

     

    Regards,

    Leonardo Trinta

  •  - noticed that screen shots aren't attached. Follow here:

  • Hello  how are you? 

    Can you help me with this?

    I have a certain urgency in this project.

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    The settings match what I see in projects that I have used in the past. Have you made any changes to the PGA900.cmd file, particularly to the memory map? The second line in the post build steps (that specifies memwidth) may not be necessary. I don't seem to have that in another project I have generated a hex file from.

    One more thing I would test first is to see if you can program a known hex file without issue. I'm attaching a hex file of all zeros. If you try to program this file and it fails the verification, there is something outside of the hex file that is to blame, since the result of programming this hex file is the same as the current (empty) OTP on a brand new PGA900 device. 

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/1023/7485.pga900_5F00_OTP_5F00_allz_5F00_8k.hex

    Regards,

  • Hello Scott!! 

    In fact, probabily the problem are outside of the hex file. The same error occurs with file that you sent. Can you flash this HEX in your PGA900? 

    Which are they situations that cause this error?

    I tried with CSS 6.2 and the same error occurs. With the uniflash too. 

    The V_OTP of 7.4V are applied on V_OTP pin. Beyond REMAP register, have anything else to do? 

    Regards, 

    Leonardo Trinta

    *****EDIT: MY pga900.cmd file:

    /* =============================================================================
    *                 Texas Instruments PGA900 Platform Software
    * (c) Copyright Texas Instruments, Incorporated. All Rights Reserved.
    *
    * Use of this software is controlled by the terms and conditions found
    * in the license agreement under which this software has been supplied.
    * =========================================================================== */
    /**
    * @file pga900.cmd
    *
    * This File contains CCS linker configuration file for PGA900
    *
    * @path $(CSLPATH)\PGA900\
    *
    * @rev 1.1
    */
    /* -----------------------------------------------------------------------------
    *!
    *! Revision History
    *! ===================================
    *! 01-July-2013 mf: Modified TusharB. Change required per PGA900
    *! to provide initial CCS linker configuration file.
    * =========================================================================== */
    
    --retain=g_pfnVectors
    
    /* The following command line options are set as part of the CCS project.    */
    /* If you are building using the command line, or for some reason want to    */
    /* define them here, you can uncomment and modify these lines as needed.     */
    /* If you are using CCS for building, it is probably better to make any such */
    /* modifications in your CCS project and leave this file alone.              */
    /*                                                                           */
    /* --heap_size=0                                                             */
    /* --stack_size=256                                                          */
    /* --library=rtsv7M3_T_le_eabi.lib                                           */
    
    /* The starting address of the application.  Normally the interrupt vectors  */
    /* must be located at the beginning of the application.                      */
    #define APP_BASE 0x00000000
    #define RAM_BASE 0x20000000
    
    /* System memory map */
    
    MEMORY
    {
        /* Application stored in and executes from internal flash */
        OTP (RX) : origin = APP_BASE, length = 0x00002000
        /* Application uses internal RAM for data */
        SRAM (RWX) : origin = 0x20000000, length = 0x00000400
        /* Application can be stored in DRAM and executes from DRAM */
        DRAM (RX) : origin = 0x21000000, length = 0x00002000
    }
    
    /* Section allocation in memory */
    
    SECTIONS
    {
        .intvecs:   > APP_BASE
        .text   :   > OTP
        .const  :   > OTP
        .cinit  :   > OTP
        .pinit  :   > OTP
        .init_array : > OTP
    
        .vtable :   > RAM_BASE
        .data   :   > SRAM
        .bss    :   > SRAM
        .sysmem :   > SRAM
        .stack  :   > 0x20000000
    }
    
    __STACK_TOP = 0x20000000;
    

  • Hi Leonardo,

    If you've had success debugging previously I don't expect there to be an issue with the target configuration, but just in case please try this target configuration file to make sure the settings are correct.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/1023/PGA900TargetConfiguration.ccxml

  • Hello Scott, the below output is generated on console:

    What do you think about it?

    Regards,

    Leonardo Trinta

  •  Can you provide 10 samples of PGA305? We are not meeting to buy this chip and this project has passed our customer deadline. 

  • Hi Leonardo,

    At the moment it looks like we are out of stock of the PGA305, and I am not sure when samples will be available again. 

    In the meantime, my understanding is that your firmware for the PGA900 has been tested through the debug mode in CCS. Is it possible for you to communicate with your PCB through SPI or I2C using the PGA900EVM or the USB2ANY on its own? This way you can at least load your generated hex file using the PGA900EVM GUI and verify that it operates as you expect it to. You could also use the EVM and GUI to load your firmware onto a bare PGA900 device in the PGA900EVM socket before it is soldered to your PCB as another option.


    Regards,

  • Hi Scott, 

    I understand. 

    Unfortunatelly I don't have the USB2ANY or PGA900EVM. Just my custom boards and the XDS200 debugger. 

    Have any way to simulate a USB2ANY with another hardware? Like a uC to communicate with I2C and flash the OTP?

    Do is there no other indication of what may be happening? I can't justify the purchase of USB2ANY since the XDS200 should support the OTP memory flash.

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    Any SPI or I2C controller can be used to communicate with the PGA900. The timing specifications are all included in the PGA900 datasheet along with the data formatting required. Additionally there are specific sections describing OTP programming using SPI or I2C in particular. These can be used to configure an external microcontroller to provide the correct SPI or I2C transactions.

    As far as the XDS200 programming goes, it still looks like there is some error with the connection to the target when it is attempting to load. Before loading the program are you able to verify the target connection? I know that you said you were previously able to debug. Is that still the case?


    Regards,

  • Hello Scott,

    I still debug the target loading the firmware on DEVRAM with XDS200. But when I try program the OTP memory the error occurs. 

    Can you do flash OTP memory with XDS200 on your test bench? 

    I'll to try make a flasher using the I2C protocol. But I would like a position about the use of XDS200 to program OTP memory. I bought it on Brazil for over R$5000 with tax. And not being able to use it to load the firmware to the OTP makes that purchase (somehow) unjustifiable.

    Regards, 

    Leonardo Trinta

  • Hi Leonardo,

    I will test this on my end to see if I can replicate your issue. I should be able to get back to you by Wednesday or Thursday next week.

    Regards,

  • Hi Leonardo,

    I haven't been able to complete this testing yet, but I will get to it on Friday and have an update by the end of the day.

    Regards,

  • Hello Scott,

    Ok, I'm waiting.

    Thank you!

    Best Regards,

    Leonardo Trinta

  • Hi Leonardo,

    In my testing I have been able to program the OTP through the XDS200. The settings seem to be what you are using, so I need to do some additional debugging to try to replicate the error that you are getting. What version of CCS are you currently using?


    Regards,

  • Hello Scott, how are you? 

    Thank you for testing.

    • The CSS version is the 10.1.1 (But I tried with CSS6 too).
    • The compiler version is 5.2.6.
    • V_OTP is applied between GND and VOTP pin. This GND not is the current loop return, does that correct?
    • The supply voltage of PGA900 is 5V (VDD).

    Have you a e-mail to receive this schematic? (Is confidential, so I can't post here).

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    Thanks for the message. I've received the schematic and I am looking into this.

    Regards,

  • Hello Scott!

    Were you able to analyze it?

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    So far I have not seen any issue with the schematic that you sent me. I will be doing some further testing with the software to try to replicate the error you are seeing. I will be out of the office until Monday, so it will take some time.


    Regards,

  • Hello Scott! 

    Ok. Can you send to me a step-by-step of your procedure? 

    I uninstalled the CCS of my computer and I follow this document: 

    But, the same error occurs when I try flash the OTP memory (modifying the REMAP bit on .gel file). What are the ocasions that this error occurs? Fail on verification of OTP memory? Is probabily hardware? Software? I really cannot understand until now what can cause this error. 

    Regards,

    Leonardo Trinta

  • Hello , how are you?

    Do you have news about this? 

    Regards,

    Leonardo Trinta

  • Hello Scott,

    Today is the 29th day of your last message. Can you help me? 

    I purchased the PGA900EVM and the same error occurs. That is, not is a hardware issue probabily. 

    I have been thinking... Can you send to me a zipped file that contains your installation of CCS and all configurations of your project of PGA900?

    Best Regards,

    Leonardo Trinta

  • Hi Leonardo,

    I am using Version: 9.3.0.00012 of CCS, and I am attaching the ccxml file for the target configuration (I have to upload it in a zip). The project options are unchanged from the example firmware, although those configurations should not make a difference when writing a generated hex file. You may have some success if you try an older version.

    I have also tried Uniflash version 4.3.0.1802 which has also worked so far with the same ccxml file and gel file. At this point, I still have not been able to replicate the issue you are seeing.

    PGA900TargetConfiguration.zip

  • Scott,

    Have you tried with EVM in current mode?

    Regards,

    Leonardo Trinta

  • Hi Leonardo,

    I have tested this in both voltage and current output mode, and in both cases it can be programmed. The output circuitry for the DAC shouldn't have any effect on the programming of the PGA900. Have you noticed a dependency in your testing? Does it work in voltage mode, but not current mode, or vice versa?

    Regards,