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Original question:

TDC7201-ZAX-EVM: TDC7200EVM (COMx) 端口问题

TDC7201-ZAX-EVM: Stop Trig setting question.

Kami Huang60
Genius 3830 points
Part Number: TDC7201-ZAX-EVM
Other Parts Discussed in Thread: TDC7201

Dear Sir/Ms.

My customer has a question about TDC7201 Trig setting. His questions are as follows: Can TDC7201 set 5 STOPs? And compulsorily send TRIG when for example 20us? Let the MCU read the distance (the number of distances may be different each time), because there is no way to guarantee that there are 5 TRIGs each time. When I talk to customers, what they mean should be whether the TRIG of TDC7201 can be changed to TRIG once at a fixed time. Let them count the number of STOPs?

Best Regards,

Kami Huang

  • 0
    Genius 3830 points

    Dear Sir/Ms.

    I made a mistake about what the customer meant, and what the customer meant was whether two conditions could be set, If one of the two conditions is reached, the INTB will be sent to the MCU Tell the MCU that the data can be read.

    The two conditions are: Condition 1: 5STOP reached OR No matter how many STOPs are received after 20uS after condition 2 triggers START.

    If it is condition one MCU can read 5 pens when reading. If it is condition two When MCU reads, it is uncertain how many pens may be 0-5 pens.

    If it is condition two Whether to trigger several data Can you read it back For example,

    if there are only two data, you can read two data back. There are only 3 data and 3 data come back.

    Best Regards,

    Kami Huang

  • 0 in reply to Kami Huang60
    TI__Expert 3450 points

    Hello,

    Up to 5 stop signals can be measured. If the device does not receive the specified number of stop signals then it waits until the clock counter overflows and an overflow interrupt is set. If this happens, this will immediately end the measurement and INTB will assert low, but the counter results for the stop signals that were received will still be available in the TDCx_TIMEx and TDCx_CLOCK_COUNTx results registers. FORCE_CAL=1 would need to be set to perform calibration regardless of overflow. 

    See post 867524

    TDC7201 datasheet 7.4.3:

    Does this answer your question?

    Regards,

    Gabriel

  • 0 in reply to Gabriel Lake1
    Prodigy 10 points

    Hello,

    As you say

    If the device does not receive the specified number of stop signals then it waits until the clock counter overflows and an overflow interrupt is set. 

    Can I set the timeout Time?

    Ex:Set the timeout in 20us.

    Thanks

    Best Regards,

    Craig

  • 0 in reply to Li Liang hung
    TI__Expert 3450 points

    Hi Craig,

    Yes, the clock overflow count is a 16-bit value that can be set in the TDC720xEVM GUI: CLOCK_CNTR_OV_H (upper 8 bits), and CLOCK_CNTR_OV_L (lower 8 bits). 

    For example with a 16MHz clock, setting CLOCK_CNTR_OV_H = 0x1, CLOCK_CNTR_OV_L = 0x40 would equate to 20us (320 clock periods). 

    Data sheet explanation:

    Regards,

    Gabriel