AWR1642BOOST: Register maps in sdk files vs manual ..

Hi,

SPARE registers are not hardcoded register used by the hardware peripherals or any of its module, so it is not explained in TRM.

These spare registers are being used either by the bootloader or SDK driver/applications, where functionality or purpose may vary.

Here are few used SPARE registers for your info and remaining out of SPARE0-9 can be used by the application.

SPARE0 is being used by the RadarSS to store the boot up status & calibration done status, SOC_waitAPLLCalibration, SOC_waitBSSPowerUp function

SPARE1 register is being used by the SDK driver to handshake b/w MSS and DSS core.

SPARE2 is being used to store the APLL Open clock frequency.

SPARE9 is used by the bootloader to store the reset cause of the device. Refer this - https://e2e.ti.com/support/sensors/f/1023/t/850397

Regards,

Jitendra

Hello @Jitendra

> .. Here are few used SPARE registers for your info and remaining out of SPARE0-9 can be used by the application.

The remaining:  so one can assume that will not be used say in future TI's firmware / rom / bootloader code / MMwave SDK .. ?  Wondering if I do in fact want to put something in them, it it will be safe from firmware / sdk updates.

 > ..SPARE1 register is being used by the SDK driver to handshake b/w MSS and DSS core.

Does it mean they accessible say way cross MSS, DSS subdomains, and they also warm reset persistent?

On the other hand the thread about bootloader using those registers is how I came by with my OP.  (spent hours trying to figure out why reset cause registers seem not working, only to find out there is this bootloader effect not quite mentioned elsewhere I looked).

In that last regard, I have to ask specifically about the reboot cause in SPARE9, the  last vs previous reset cause;

SPARE9 [3:0] = current system reset cause (topRCM->SYSRSTCAUSE)

SPARE9 [19:16] =  previous system reset cause(topRCM->SYSRSTCAUSE) 

Could you confirm that  the previous is in fact 1 reset memory here, in other words   previous(t) = current(t-1) ?  And this works for any resets except NRESET? I dont' seem get this memory effect, quick test I did I only get last reset in both.  ( excluding cold start of course )

Jitendra Gupta said:

Here are few used SPARE registers for your info and remaining out of SPARE0-9 can be used by the application.

This my be not complete list of what the "remaining" free are.  

I tested and in my app if I use SPARE4, writing to this register prevents the system booting up properly on reset, with mmwave init stuck waiting for reply in the link layer invoking the remote command to radar subsystem - which it never gets.

Without writing SPARE4, system comes up same / properly as before... 

Any chance you have missed what can /not be used from those SPAREx registers?

This was MSS WDOG reset.    Not NRESET / external through button,   that is not an interesting reset for this.

Yes, I'm counting on it preserving values.

However, the important thing here for me is that, the list you originally indicated is _not_ complete, and I'm wondering where / how one can track which of those SPAREx registers are used by the TI"s layer. 

If I understood you correctly, there isn't a document/ file which keeps track of them all used that you maintain. So it's all upto following the forum thread.?