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TS3A27518E: Cascaded SPI MUX/DEMUX Circuits.

Part Number: TS3A27518E

Dear Ti experts,

I have done a SPI memory circuits design using TS3A27518E. Attached the schematics design pdf file and high-level block diagram of the requirement. My intention is to flash the SPI flash memory via following method .

1) SPI memory flashing via external header(I will be using aardvark SPI host adapter for programming)

2)SPI memory flashing via I2C to SPI Bridge IC

3)SoC processor will take binary from SPI Memory and it will boot and start functioning

Above 3 selection is based the selection of 2 mux/Demux IC.

Could you please review the schematics and confirm all electrical parameters is matching , can we proceed further?

High-Level Block Diagram

/cfs-file/__key/communityserver-discussions-components-files/388/SPI-Programming-architecture.png

Shematics File

/cfs-file/__key/communityserver-discussions-components-files/388/I2C-to-SPI-Bridge-programming.pdf

Regards,
Sujith M