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TS3DV642 - HSPICE model

Other Parts Discussed in Thread: TS3DV642

Hi all,

Would you mind if we ask TS3DV642 HSPICE?

<Question1>
Our customer uses TS3DV642 HSPICE model which was downloaded from TI's Website
Also "TS3DV642_Hspice_testbench.pdf" was downloaded the same,
then we have two questions. (About detail, please refer to attached file.).
8877.20141022_TS3DV642_Hspice_testbench.pdf

On the testbench, are EN,SEL1,SEL2,VDDA internal signals on the software?

<Question2>
Our customer uses simulation software which is Synopsys's HSPICE.
Our customer simulated "TS3DV642.sp" with Synopsys's HSPICE, it shows "no convergence in operating point",
at last the program had been forced termination as following attachment file.
1007.20141022_TS3DV642_Testbench result.pdf
If you know, could you let know us what this cause?

Kind regards,

Hirotaka Matstumoto

  •  Hirotaka,

     

    <Question1>

    1) There is a difference in the line items you highlighted in the logic table. 

    You can see this information with a diagram on page 3 of the TS3DV642 datasheet for a visual aid. 

    When you apply a logic "HIGH" to the EN pin and logic "LOW" to the SEL1 and SEL2 pins, D0+/D0- to D0+A/D0-A is on and D0+/D0- to D0+B/D0-B are off.  The other 4 switch paths are off as well (SCL,SDA,HPD,CEC) to (SCL_A SCL_B, SDA_A SDA_B, HPD_A HPD_B, CEC_A CEC_B) 

    When you apply a logic "HIGH" to the EN pin and logic "High" to the SEL1 pin and logic "LOW" to SEL2 pin,  D0+/D0- to D0+A/D0-A is on and the 4 switches (SCL,SDA,HPD,CEC) to (SCL_A, SDA_A, HPD_A, CEC_A)  are on.

    2) A0, A1,....A11 correspond to the Common side of the 1:2 mux D0+/D0-,D1+/D1-,.....D7+/D7- SCL,SDA,HPD,CEC. 

    B0,B1,....B11 correspond to the A side of the 1:2 mux and C0,C1,.....C11 correspond to the B side of the 1:2 mux

    TS3DV642_HSPICE_testbench.pdf is a screen shot of a sample simulation.  The EN,SEL1,SEL2,VDDA are generic input signals for the power and logic inputs.

     

    <Question 2>

    I do not have much insight to the modeling and software but  I would try posting this question to the modeling and simulations forum http://e2e.ti.com/support/development_tools/webench_design_center/f/234.aspx.

     

    Thank you,

    Adam

  • Hello Adam San,

    Thank you for your prompt reply and your cooperation!

    About <Q1>, Ok we got it.

    About<Q2>, we are waiting for any update from you.

    Kind regards,

    Hirotaka Matsumoto