Hi Sirs,
Sorry to bother you.
Our application is
If customer would like use RS232, SIO will pull pin5 and Pin13 to high，chA and chB pass
If customer wolud like use RS485,SIO will pull pin6 and Pin12 to high，chC and chD pass
Could you help check our schematic is OK. Thanks!!
Shu-Cheng,
The CD4066 is correctly powered with 7.5 V on VDD and -7.5 on Vss.
If your signal passing through the switch is +/-6V you will have better Ron if your supply rails are greater than +/-6V
The function table is a little strange but it is communicating that the control pins 5,6,12, and 13 (CONTROLA/B/C/D) place the signal path in a Hi-Z state when pulled below logic low Vil and low impedance state when pulled above Vih logic high.
If customer would like use RS232, SIO will pull pin5 and Pin13 to high，chA and chB pass
Pulling pins 5 and 13 high will enable the signal path SIGA and SIGB path and pass any signal from one side to the other
If customer wolud like use RS485,SIO will pull pin6 and Pin12 to high，chC and chD pass
Pulling pins 6 and 12 high will enable the signal path SIGC and SIGD path and pass any signal from one side to the other
As mentioned above if the control pins see a 0V (logic low) the SIG paths will be Hi-Z and not pass anything from SIGOUT/IN to SIGIN/OUT
Thank you,
Adam
