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DSS loadraw and C66X cache writeback invalidate

I am using the DSS javascript API to call loadRaw() on a TDA3X DSP1. The purpose is to load an image into DDR.

Javascript code is as follows.

...

  dsp1ds.memory.loadRaw(0, n_location, tmpFile,32,false );

...

Based on some experimentation I suspect that the load is done directly to DDR. And DSP1's cache is not invalidated. My theory is that my C program gets a mostly updated input image but some parts of the image are stale from from the previous contents of the data cache.

I have two questions:


1. Does loadRaw() perform any cache invalidate or is that the DSP1's responsibility to invalidate it's cache before the load?

2.The first parameter of loadRaw is "nPage". Should I be setting this to "1" for "DATA" and not "0"?

Thanks,

AYM

  • Hello,
    Yes, it writes directly to DDR

    1. The DSS API itself does not invalidate cache

    2. For any non-paged memory system, you should use "0" (as is the case with 66x)

    Thanks
    ki
  • OK. So DSS loadRaw() has no concept of cache. And loadRaw() reads and writes directly to/from DDR leaving it to me to invalidate cache in DSP1 with the C program on DSP1 prior to the Javascript call to DSS loadRaw().

    But what about the Javascript DSS API dsp1ds.expression.evaluate()?

    Seems to me that if dsp1ds.expression.evaluate() doesn't use a view through the cache then CCS GUI would not be able to successfully debug a DSP1 C program.

    Is dsp1ds.expression.evaluate() cache aware? Does dsp1ds.expression.evaluate() read and write debug memory addresses viewed through the cache?

    Andrew