CCS/TMS320F28377S: Adjusting heap size. Linker can find enough memory.

Kyle Stoudt

Part Number: TMS320F28377S

Tool/software: Code Composer Studio

I am running into a problem where I can not extend the heap size past 0x800. It was defaulted at 0x400 and I can get it upto 0x600 using the Properties->Linker->General settings. There is 164KB of ram available and I am not sure what I need to change in the .lnk file to get access to more ram.

This is the error that I am receiving when I try and use a heap size of 0x800 and stack size of 0x200

**** Build of configuration Debug for project Example_28377SLaunchPad ****

"D:\\ti\\ccsv7\\utils\\bin\\gmake" -k -j 16 all -O 
'Building target: Example_28377SLaunchPad.out'
'Invoking: C2000 Linker'
......

>> Compilation failure
makefile:180: recipe for target 'Example_28377SLaunchPad.out' failed
"D:/ti/device_support/F2837xS/v180/F2837xS_common/cmd/2837xS_Generic_FLASH_lnk.cmd", line 80: error: 
   program will not fit into available memory.  run placement with
   alignment/blocking fails for section ".cio" size 0x120 page 1.  Available
   memory ranges:
   RAMLS5       size: 0x800        unused: 0x0          max hole: 0x0       
   .cio				   : > RAMLS5     PAGE = 1
error: errors encountered during linking; "Example_28377SLaunchPad.out" not
   built
gmake[1]: *** [Example_28377SLaunchPad.out] Error 1
gmake: *** [all] Error 2
makefile:176: recipe for target 'all' failed

**** Build Finished ****

This is the linking file, however I am not too familiar with it and am not sure what needs to be changed.

MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           	: origin = 0x3FFFC0, length = 0x000002
   
   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */   

PAGE 1 : /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000

}


SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHB,     PAGE = 0, ALIGN(4)
   .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN       PAGE = 0, ALIGN(4)
   ramfuncs            : LOAD = FLASHD,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
						 
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1        PAGE = 1
   .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1       PAGE = 1
   .esysmem            : > RAMLS5       PAGE = 1
   .cio				   : > RAMLS5     PAGE = 1

   /* Initalized sections go in Flash */
   .econst             : >> FLASHF | FLASHG | FLASHH      PAGE = 0, ALIGN(4)
   .switch             : > FLASHB      PAGE = 0, ALIGN(4)
   
   .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

#ifdef __TI_COMPILER_VERSION
   #if __TI_COMPILER_VERSION >= 15009000
    .TI.ramfunc : {} LOAD = FLASHD,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
   #endif
#endif
   
   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1
   
   /* The following section definitions are for SDFM examples */		
   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
   Difference_RegsFile : >RAMGS5, 	PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

over 8 years ago

0 AartiG over 8 years ago

TI__Guru**** 173310 points

Kyle Stoudt said:
This is the error that I am receiving when I try and use a heap size of 0x800 and stack size of 0x200

Heap goes into the memory section named .esysmem. And the linker command file is allocating both .esysmem and .cio to RAMLS5 memory which has a length of only 0x800. So when you set the heap size to 0x800, the .esysmem section alone will use up all of RAMLS5 leaving no space to allocate for .cio section within that same memory region. Hence the error message that you are seeing.

You can edit the linker command file to allocate .cio to a different memory region, like RAMD1, or any of the other RAM regions:

.cio				   : > RAMD1     PAGE = 1

Note that if you increase heap size above 0x800 then it will not fit in RAMLS5 either. You would then need to move the .esysmem section into a larger RAM region. You can also combine consecutive RAM regions into a single one of larger size, in order to be able to allocate larger sections into it.

There is a wiki page that provides a good introduction into linker command files and its syntax, and how the MEMORY and SECTIONS directives work. Please take a look at it here, it should help clarify what I have explained above.

0 Kyle Stoudt over 8 years ago in reply to AartiG

Prodigy 30 points

Thanks, the article was very helpful, but now I'm having a troubling problem. I have made the following change to the linker file:

.esysmem : > RAMLS5 to

Which gives me a linker script of

MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           	: origin = 0x3FFFC0, length = 0x000002
   
   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */   

PAGE 1 : /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x007000
   //RAMGS3      : origin = 0x00F000, length = 0x001000
   //RAMGS4      : origin = 0x010000, length = 0x001000
   //RAMGS5      : origin = 0x011000, length = 0x001000
   //RAMGS6      : origin = 0x012000, length = 0x001000
   //RAMGS7      : origin = 0x013000, length = 0x001000
   //RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000

}


SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHB,     PAGE = 0, ALIGN(4)
   .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN       PAGE = 0, ALIGN(4)
   ramfuncs            : LOAD = FLASHD,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
						 
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1        PAGE = 1
   .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1       PAGE = 1
   //.esysmem            : > RAMLS5
   .esysmem            : >> RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7 | RAMGS8    PAGE = 1
   .cio				   : > RAMLS5     PAGE = 1

   /* Initalized sections go in Flash */
   .econst             : >> FLASHF | FLASHG | FLASHH      PAGE = 0, ALIGN(4)
   .switch             : > FLASHB      PAGE = 0, ALIGN(4)
   
   .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

#ifdef __TI_COMPILER_VERSION
   #if __TI_COMPILER_VERSION >= 15009000
    .TI.ramfunc : {} LOAD = FLASHD,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
   #endif
#endif
   
   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1
   
   /* The following section definitions are for SDFM examples */		
//   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
//   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
//   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
//   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
//   Difference_RegsFile : >RAMGS5, 	PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

This may be incorrect as I am now having a very weird bug in my code, likely some memory corruption. I am trying to perform a memcpy and some variable are being set to 0 while others are being modified. See the comments in the code below for the issue. I can not tell why it is being effected the way that it is, unless I did something wrong with the linker.

DecodePacketFooter(const uint8_t* packetData, const int length)
{
	int dataLength;

	
		uint8_t footerData[6];

		// Convert the Base64 encoded footer.
		// The footer consists of 6 bytes encoded into the last 8 bytes of the message
		base64->Decode(packetData + length - 8, footerData, 8, 6);

                // packetData[] is now [213,110,0,0,0,0]

		dataLength = length - 9;

		/*string footerInput = System.Text.Encoding.Default.GetString(packetData, packetData.Length - 8, 8);
		data = System.Text.Encoding.Default.GetString(packetData, 0, packetData.Length - 9);

		byte[] footer = Convert.FromBase64String(footerInput);*/

		// Parse out footer data (1st 2 bytes are CRC16, last 4 are the packet number)
		uint16_t crc16 = 0; 
		uint32_t packetNumber = 1; // set to 1 instead of zero for testing

		memcpy(&crc16, footerData, 2); // dataLength is 4, Lenth is 13
		memcpy(&packetNumber, footerData + 2, 4); // After this line executes dataLength and length are both 0???  packetNumber is 0 as I would expect 
		        // footerData has changed from [213,110,0,0,0,0] to [110,110,0,0,0,0]???

0 AartiG over 8 years ago in reply to Kyle Stoudt

TI__Guru**** 173310 points

Kyle Stoudt said:
.esysmem : >> RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7 | RAMGS8 PAGE = 1

Since you have combined several RAMGS* regions into RAMGS2, this statement can simply be:

.esysmem : > RAMGS2 PAGE = 1

Just FYI, per this post, the .esysmem section cannot be split (that is what the >> operator does).

Kyle Stoudt said:
This may be incorrect as I am now having a very weird bug in my code, likely some memory corruption.

That is possible, however the linker command file itself looks ok. Have you set enough of a heap size for your program?

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CCS/TMS320F28377S: Adjusting heap size. Linker can find enough memory.