CCS/CCSTUDIO: Random values stored in the Memory Browser

Bhavanithya,

I see the values are shown in external DDR, therefore I can't help but think that maybe there are some initialization issues with it - that or other things such as optimization of your code, which may cause strange values stored as they may not be available in memory at all times.

One additional detail: given you are using a very old version of CCS, there is a chance the GEL file used to properly initialize its hardware may be very old. Can you update your Sitara device support package and get the newer AM3359 ICE GEL file? This is particularly critical if your board is v2.

Reference: e2e.ti.com/.../1617136

To be absolutely certain of that, would you mind sharing a testcase that reproduces this issue?

Regards,
Rafael

Refael,

Thank you for the reply.

I can show the code snippets for your reference,

Header file looks like this,

A429RxLabel is inside the testModule (parent container). This is just one block in rxlabel, there are many similar to this,

I am trying to get the value of the label_id_attr which is a char* using the below code snippet,

char* label_id_config = 0;

for (i = 0; i < Module_size; i++) {
    for (j = 0; j < Rxlabel_size; j++) {
        label_id_config = TestBench.Module[i].HardwareContainer[1].A429RxChannel.A429RxLabel[j].label_id_attr;
        if(label_id_config!=0)
            printf("label_id_config = %s \n",label_id_config);
    }
}

Result: label_id_config = @
Expected : label_id_config = 032

Bhavanithya Thiraviaraja65 said:

In the header file, value of a variable char * label_id_attr = "032" at one point , but the value in memory browser is "@"

Does the memory browser show the correct value for label_id_attr when the program has reached main?

Or does the corrupt value appear at a later time?

Trying to understand if you have a CCS problem, hardware problem or if the the running program is corrupting memory.

Hello Chester,

The memory browser shows the correct value when it reaches main,

Can see below, the address 0x8004066c has "032"

But after the program is run, the value gets corrupted,

So do you think there is some problem with the code?

I could see, a part of the TI code overwrites the memory,

I have attached the c file which is responsible for overwriting the memory,

the part of the code in the code file which overwrites (function relocate_reload_code()) is as below

void relocate_reload_code() {
    Uint32 itr = 0;
    Uint32 len = (Uint32) &app_reload_code_size;
    Uint32 * src = (Uint32 *) &app_reload_code_start;
    Uint32 * dest = (Uint32 *) &app_reload_code_run;

    for (itr = 0; itr < len; itr++) {
        dest[itr] = src[itr];
    }
}

 

/**
 * tiescutils.c
 * 
 *
 * Copyright (c) 2012 Texas Instruments Incorporated ALL RIGHTS RESERVED
 *
 */
#include "ecat_def.h"
// get the firmware loaded as header files!
#include "ecat_frame_handler_bin.h"  // EtherCAT frame handler
#include "ecat_host_interface_bin.h" // EtherCAT host interface
#include "gpio_v2.h"
#include "soc_AM335X.h"
#include "tiescutils.h"
#include "ecat_appl_cnfg.h"
#include "ecatappl.h"
#include "ecatslv.h"
#include "mcspi.h"
#include "plat_delay.h"
//#define PROFILE_ECAT_STACK
#ifdef PROFILE_ECAT_STACK
#include "tiescbsp.h"
Uint32 mainloop_delta, mainloop_max, pdi_delta, pdi_max, sync_delta, sync_max;
#endif
#include "osdrv_oledlcd.h"
#include "osdrv_mcspi.h"

#include "displayUtils.h"
#include "spirw.h"
#include "arincUtils.h"
#include <xdc/runtime/Timestamp.h>
#include <xdc/runtime/Types.h>
#include <Math.h>
#include "hi3200helper.h"
#include "ecatArincAPI.h"
#include "displayUtils.h"
#include "ecat_host_interface_bin.h"
#include "global_conf.h"

Uint8 uartInstance = 4;
Uint8 boardType = AM335X_BOARD_TYPE_ICE_V2;

char VisiGenieEvent[6];
int eventCounter = 0;

//Used in txRateHandler
int DELTA = 1;
UINT8 countFalseMCR = 0;

extern void SpiFlashRegisterMSDelayfn(void*);
#if CiA402_DEVICE
extern UINT16 APPL_GenerateMapping(UINT16 *pInputSize,UINT16 *pOutputSize);
extern UINT16 CiA402_Init();
#endif

Task_Handle taskEcatHnd; // ECAT mainloop
Task_Handle taskArincHnd; // ARINC mainloop
Task_Handle taskDisplayHnd;

Semaphore_Handle sem;

#ifdef ENABLE_PDI_TASK
Task_Handle pdiTask; // ECAT sw ISR
#else
#ifdef ENABLE_PDI_SWI
Void PDIswi(UArg arg1, UArg arg2);
Swi_Handle pdiSwi; // ECAT sw ISR
#endif
#endif
// UART processing
Task_Handle taskUartHnd;
// LED Control Task
Task_Handle taskLedHndl;

#ifdef ENABLE_SYNC_TASK
// ECAT SYNC0 ISR
Task_Handle sync0Task;
Void Sync0task(UArg arg0, UArg arg1);
// ECAT SYNC0 ISR
Task_Handle sync1Task;
Void Sync1task(UArg arg0, UArg arg1);
#endif
Uint32 appState = 0;

#define APPL_BUILD_VER  "3.3.0"

//#define ENABLE_DC64BIT_TEST
#define LATCH_TEST
#define	SYSTIME_TEST

void findOutCPUFreq() {
	Types_FreqHz freq1;
	Types_FreqHz freq2;
	Float factor;
	/* Clock ratio cpu/timestamp */
	Timestamp_getFreq(&freq1);
	BIOS_getCpuFreq(&freq2);
	factor = (Float) freq2.lo / freq1.lo;
	printf("\r\n%lu\t%lu\t%lu\t Timestamp Freq, BIOS Freq, Factor", freq1.lo, freq2.lo, (UInt32) factor);
}

Void taskEthercat(UArg arg0, UArg arg1) {
	printf("\nEthercat task started.");
	Uint8 u8Err = 0;
	Task_Params taskParams;
#ifdef ENABLE_PDI_SWI	
	Swi_Params swiParams;
#endif	

#ifndef EXEC_FROM_IRAM
	findOutCPUFreq();
	/** map the array which contains pru firmware instrcutions.
	 If the application is built to execute from internal RAM completely,then
	 pru instructions are expcted to be stored in SPI flash and this mapping is
	 not required*/
	bsp_set_pru_firmware((Uint32*) FrameProc, sizeof(FrameProc), (Uint32*) HostProc, sizeof(HostProc));
#endif

	LEDInit();
	if (AM335X_BOARD_TYPE_ICE_V2 == boardType) {
		UTILsInitCpswIcssPorts(ICSS_SWITCH);
		//McSPI instance 0 on ICE V2
		SpiFlashInit(0, 0);
	} else if ( AM335X_BOARD_TYPE_ICE == boardType) {
		//McSPI instance 0 on ICE
		SpiFlashInit(0, 0);
	} else {
		//McSPI instance 1 on IDK
		SpiFlashInit(1, 0);
	}

	/* initialize the Hardware and the EtherCAT Slave Controller */
	HW_Init();

	// Increase SYNC0 PRUSS ISR and CMD, CMD_ACK ISR is done by PRUSS driver
	//Set the timer priority
	Hwi_setPriority(68, 0x23);

	u8Err = MainInit(); // EtherCAT stack init

#if CiA402_DEVICE
	/*Initialize Axes structures*/
	CiA402_Init();
	/*Create basic mapping*/
	APPL_GenerateMapping(&nPdInputSize,&nPdOutputSize);
#endif
	/* Create tasks */
	/* Create tree tasks that share a resource*/
#ifdef ENABLE_PDI_TASK
	Task_Params_init(&taskParams);
	taskParams.priority = 6;
	taskParams.stackSize = 1512;
	pdiTask = Task_create(PDItask, &taskParams, NULL);
#else
#ifdef ENABLE_PDI_SWI
	Swi_Params_init(&swiParams);
	swiParams.priority = 6;
	pdiSwi = Swi_create (PDIswi, &swiParams, NULL);
#endif
#endif
#ifdef ENABLE_SYNC_TASK
	Task_Params_init(&taskParams);
	taskParams.priority = 8;
	taskParams.stackSize = 1512;
	sync0Task = Task_create(Sync0task, &taskParams, NULL);

	Task_Params_init(&taskParams);
	taskParams.priority = 8;
	taskParams.stackSize = 1512;
	sync1Task = Task_create(Sync1task, &taskParams, NULL);
#endif

#ifdef ENABLE_DC64BIT_TEST
	Task_Params_init(&taskParams);
	taskParams.priority = 3;
	testTsk = Task_create (testTask, &taskParams, NULL);
#endif

	if (u8Err == 0) {
		bRunApplication = TRUE;
		do {
			//Task_sleep (1);
#ifdef PROFILE_ECAT_STACK
			{
				Uint32 mainloop_start, mainloop_stop;
				bsp_get_local_sys_time(&mainloop_start, 0);
#endif      
			MainLoop();
#ifdef PROFILE_ECAT_STACK
			bsp_get_local_sys_time(&mainloop_stop, 0);
			if (mainloop_stop >= mainloop_start)
			mainloop_delta = mainloop_stop - mainloop_start;
			else
			mainloop_delta = 0xFFFFFFFFF-mainloop_start+mainloop_stop;
			if(mainloop_delta > mainloop_max)
			mainloop_max = mainloop_delta;
		}
#endif
#if !defined (EXEC_FROM_IRAM) && !defined (XIP_NOR)

			if (get_app_reload_flag() == 0xAA) {
				if (pre_reload_acts() == 0) {
					//HW_Release();
					//delete_ecat_tasks();
					BIOS_exit(100);
				}
			}
#endif
			Task_yield();
		} while (bRunApplication == TRUE);
	}

	HW_Release();

	BIOS_exit(0);
}

Void updateDisplay(UINT8 lineIndex){
	if(doSwitchForm!=0xff){
		switchForm(doSwitchForm, uartInstance);
		doSwitchForm=0xff;
		Task_sleep(2000);
	}
	if(DEBUG_MODE){
		// + 1, because the display value 0 is reserved for a blank.
		char ecatStatusStringsVal[2] = { 0x00, lineIndex + 1 };
		char holtStatusStringsVal[2] = { 0x00, readMCR() };
		switch (displayedMode) {
		case DISPLAY_MODE_MONITORING:
			writeVisiGenieObject(0x11, 3, ecatStatusStringsVal, uartInstance);
			Task_sleep(5);
			writeVisiGenieObject(0x11, 7, holtStatusStringsVal, uartInstance);
			break;
		case DISPLAY_MODE_AMT:
			writeVisiGenieObject(0x11, 4, ecatStatusStringsVal, uartInstance);
			break;
		case DISPLAY_MODE_AMT_EDIT:
			writeVisiGenieObject(0x11, 5, ecatStatusStringsVal, uartInstance);
			break;
		}

	}
	//Header and Footer
	if(lineIndex == 0){
		switch(displayedMode){
		case DISPLAY_MODE_MONITORING:
			//Data Rate
			if(displayedMonitoringDataRate != data_rate){
				updateDataRate(DISPLAY_MODE_MONITORING, data_rate, 0x0, uartInstance);
			}

			//OP Mode
			if(displayedMonitoringOPState != opeartion_mode){
				updateOpMode(DISPLAY_MODE_MONITORING, opeartion_mode, 0x0, uartInstance);
			}

			//ECAT state
			if (displayedMonitoringAlStatus != nAlStatus) {
				displayedMonitoringAlStatus = nAlStatus;

				updateEcatStatus(nAlStatus, DISPLAY_CUSTOM_DIGITS_MONITORING_ECAT_STATUS, DISPLAY_STRINGS_MONITORING_ECAT_STATUS, uartInstance);
			}
			break;
		case DISPLAY_MODE_AMT:
			//Data Rate
			if(displayedAMTDataRate != data_rate){
				updateDataRate(DISPLAY_MODE_AMT, data_rate, 0x0, uartInstance);
			}


			//OP Mode
			if(displayedAMTOPState != opeartion_mode){
				updateOpMode(DISPLAY_MODE_AMT, opeartion_mode, 0x0, uartInstance);
			}

			//ECAT state
			if (displayedAMTAlStatus != nAlStatus) {
				displayedAMTAlStatus = nAlStatus;

				updateEcatStatus(nAlStatus, DISPLAY_CUSTOM_DIGITS_AMT_ECAT_STATUS, DISPLAY_STRINGS_AMT_ECAT_STATUS, uartInstance);
			}
			break;
		case DISPLAY_MODE_AMT_EDIT:
			//Data Rate
			if(displayedAMTEditDataRate != data_rate){
				updateDataRate(DISPLAY_MODE_AMT_EDIT, data_rate, 0x0, uartInstance);
			}


			//OP Mode
			if(displayedAMTEditOPState != opeartion_mode){
				updateOpMode(DISPLAY_MODE_AMT_EDIT, opeartion_mode, 0x0, uartInstance);
			}

			//ECAT state
			if (displayedAMTEditAlStatus != nAlStatus) {
				displayedAMTEditAlStatus = nAlStatus;
				updateEcatStatus(nAlStatus, DISPLAY_CUSTOM_DIGITS_AMT_EDIT_ECAT_STATUS, DISPLAY_STRINGS_AMT_EDIT_ECAT_STATUS, uartInstance);
			}
			break;
		case DISPLAY_MODE_INFO:
			//Data Rate
			if(displayedInfoDataRate != data_rate){
				updateDataRate(DISPLAY_MODE_INFO, data_rate, 0x0, uartInstance);
			}


			//OP Mode
			if(displayedInfoOPState != opeartion_mode){
				updateOpMode(DISPLAY_MODE_INFO, opeartion_mode, 0x0, uartInstance);
			}

			//ECAT state
			if (displayedInfoAlStatus != nAlStatus) {
				displayedInfoAlStatus = nAlStatus;

				updateEcatStatus(nAlStatus, DISPLAY_CUSTOM_DIGITS_INFO_ECAT_STATUS, DISPLAY_STRINGS_INFO_ECAT_STATUS, uartInstance);
			}
			break;
		}
	}

	//Main Content
	switch (displayedMode) {
	case DISPLAY_MODE_MONITORING:
		if (lineIndex == 2 && display_monitoring_selected_page != displayedMonitoringPage) {
			updateMonitoringPage(display_monitoring_selected_page, 0x0, uartInstance);
		}
		if (lineIndex == 4 && display_monitoring_unique_data != displayedMonitoringUniqueData) {
			updateMonitoringUniqueDate(display_monitoring_unique_data, 0x0, uartInstance);
		}
		updateMonitoringTabelLine(uartInstance, lineIndex);
		break;
	case DISPLAY_MODE_AMT:

		//Channel
		if (lineIndex == 2 && display_amt_channel != displayedAMTChannel) {
			updateAMTChannel(display_amt_channel, 0x0, uartInstance);
		}
		//Page
		if (lineIndex == 4 && display_amt_selected_page != displayedAMTPage) {
			updateAMTPage(display_amt_selected_page, 0x0, uartInstance);
		}

		if (display_amt_maincontent_line_print_countdown > 0) {
			display_amt_maincontent_line_print_countdown--;

			//Need channel and row cooridnates e.g. link (n x n) table?
			loadAMTLine(uartInstance, display_amt_maincontent_line_print_countdown);
		}
		break;
	case DISPLAY_MODE_AMT_EDIT:
		displayAMTEdit(lineIndex, uartInstance);
		break;
	case DISPLAY_MODE_INFO:
		displayInfo(lineIndex, uartInstance);
		break;
	}
}

Void taskArinc(UArg arg0, UArg arg1) {
	printf("\nArinc task started.");
	while (1) {
		Semaphore_pend(sem, BIOS_WAIT_FOREVER);
		//Task_sleep(5);
		//Do the actual arinc stuff
		poll_for_fifo_and_rw();
	}
}

Void taskDisplay(UArg arg1, UArg arg2) {
	printf("\nDisplay task started.");

	if (AM335X_BOARD_TYPE_ICE_V2 == boardType) {
		char *lcd_str1 = IND_SDK_VERSION;
		char lcd_str2[] = { "UART TEST APP" };

		if (FAIL != OLEDInit()) {
			OLEDShowString(1, (unsigned char *) lcd_str1, 0, 0);
			OLEDShowString(1, (unsigned char *) lcd_str2, 1, 0);
			OLEDDeactivateScroll();
			OLEDContinuousScroll(0x01, 0x01, Max_Column, 0x00, 0x00, 0x01, 0x06, 0x01);
		}
	}

	UINT8 lineIndex=0;
	while (1) {
		updateDisplay(lineIndex);
		lineIndex = (1 + lineIndex) % DISPLAY_MONITORING_MAX_ENTRYS;
		Task_sleep(1200 / DISPLAY_MONITORING_MAX_ENTRYS);
	}
}

#ifdef ENABLE_PDI_TASK

// brief Interrupt service routine for the interrupts from the EtherCAT Slave Controller
#if AL_EVENT_ENABLED
void HW_EcatIsr(void) {
#ifdef PROFILE_ECAT_STACK
	Uint32 pdi_start, pdi_stop;
	/* get the AL event register */
	bsp_get_local_sys_time(&pdi_start, 0);
#endif
	PDI_Isr();
#ifdef PROFILE_ECAT_STACK  
	bsp_get_local_sys_time(&pdi_stop, 0);
	pdi_delta = pdi_stop - pdi_start;
	if(pdi_delta > pdi_max)
	pdi_max = pdi_delta;
#endif
}
#endif

Void PDItask(UArg arg1, UArg arg2) {
	Task_sleep(10 * OS_TICKS_IN_MILLI_SEC);
#if AL_EVENT_ENABLED
	while (1) {
		PRUSSDRVPruWaitEvent(HOST_AL_EVENT);
		/* ISR processing */
		HW_EcatIsr();
	}
#endif
}
#else
#ifdef ENABLE_PDI_SWI
Void PDIswi(UArg arg1, UArg arg2)
{
#ifdef PROFILE_ECAT_STACK
	Uint32 pdi_start, pdi_stop;
	/* get the AL event register */
	bsp_get_local_sys_time(&pdi_start, 0);
#endif
	PDI_Isr();
#ifdef PROFILE_ECAT_STACK  
	bsp_get_local_sys_time(&pdi_stop, 0);
	pdi_delta = pdi_stop - pdi_start;
	if(pdi_delta > pdi_max)
	pdi_max = pdi_delta;
#endif    
}
void PDI_Swi()
{
	Swi_post(pdiSwi);
}
#endif
#endif

#ifdef ENABLE_SYNC_TASK
Void Sync0task(UArg arg1, UArg arg2) {
#ifdef PROFILE_ECAT_STACK
	Uint32 sync_start, sync_stop;
#endif
#ifndef EXEC_FROM_IRAM
#ifndef NO_UART_MSG_APP
	//UARTPutString(uartInstance, "SYNC0 task started\n\r");
#endif
#endif
	while (1) {
		PRUSSDRVPruWaitEvent(HOST_SYNC0_EVENT);
		//Do sync0 event handling
		DISABLE_ESC_INT();
#ifdef PROFILE_ECAT_STACK
		bsp_get_local_sys_time(&sync_start, 0);
#endif
		Sync0_Isr();
#ifdef PROFILE_ECAT_STACK
		bsp_get_local_sys_time(&sync_stop, 0);
		sync_delta = sync_stop - sync_start;
		if(sync_delta > sync_max)
		sync_max = sync_delta;
#endif
		ENABLE_ESC_INT();
#ifdef DC_SYNC_IRQ_LATENCY_DEBUG
		GPIOPinWrite(SOC_GPIO_1_REGS, SYNC0_HWI_GPIO_NUM, GPIO_PIN_LOW);
#endif
	}
}

Void Sync1task(UArg arg1, UArg arg2) {
#ifdef PROFILE_ECAT_STACK
	Uint32 sync_start, sync_stop;
#endif
#ifndef EXEC_FROM_IRAM
#ifndef NO_UART_MSG_APP
	//UARTPutString(uartInstance, "SYNC1 task started\n\r");
#endif
#endif
	while (1) {
		PRUSSDRVPruWaitEvent(HOST_SYNC1_EVENT);
		//Do sync0 event handling
		DISABLE_ESC_INT();
#ifdef PROFILE_ECAT_STACK
		bsp_get_local_sys_time(&sync_start, 0);
#endif
		Sync1_Isr();
#ifdef PROFILE_ECAT_STACK
		bsp_get_local_sys_time(&sync_stop, 0);
		sync_delta = sync_stop - sync_start;
		if(sync_delta > sync_max)
		sync_max = sync_delta;
#endif
		ENABLE_ESC_INT();
#ifdef DC_SYNC_IRQ_LATENCY_DEBUG
		GPIOPinWrite(SOC_GPIO_1_REGS, SYNC0_HWI_GPIO_NUM, GPIO_PIN_LOW);
#endif
	}
}
#endif



Void txRateHandler() {
	txRateFreqIndex++;

	if(ARINC_AUTO_RECONFIGURATION){
		//Check if the arinc send configuration is correct, if not fix it.
		if(readMCR() != 0xc0){
			//initHi3200(1);
			writeMCR(0xC0);

			writeATXControlReg();
			// ARXControl write should only be accessed in runlevel 0.
			setRun(0);
			writeARXControlReg();
			setRun(1);
		}
	}
	if (opeartion_mode == OP_MODE_EXTENDED) {
		unsigned char chan;
		int label;
		for (chan = 0; chan < 4; chan++) {
			unsigned char channelUsed = 0;
			if(data_rate == DATA_RATE_12_5){
				channelUsed = 1;
			}
			for (label = 1; label < 256; label++) {
				if (AMT[chan][label].txRate > 0 && AMT[chan][label].txRateEnabled == 1) {
					if (AMT[chan][label].txRateSubtract -= DELTA, (AMT[chan][label].txRateSubtract < DELTA) && channelUsed < 2) {
						struct ArincMessage am;
						am.label = label;
						am.data = AMT[chan][label].payload;
						am.sdi = AMT[chan][label].sdi;
						am.sm = AMT[chan][label].sm;
						am.parity = AMT[chan][label].invertParity;

						AMT[chan][label].txRateSubtract = AMT[chan][label].txRate;
						channelUsed++;

						unsigned long out = transformArincFromStruct(am);
						GPIOPinWrite(SOC_GPIO_3_REGS, 0x09, GPIO_PIN_HIGH);
						writeTxImmediate(chan, out);
						GPIOPinWrite(SOC_GPIO_3_REGS, 0x09, GPIO_PIN_LOW);
					}
				}
			}
		}
	}
	if(opeartion_mode != OP_MODE_OFF){
		//Activate poll for fifo
		Semaphore_post(sem);
	}
}

Void DebugUartISR(UArg arg) {
	char tmp;

	//wartet bis char im rx fifo verf�gbar ist
	UARTGetChar(uartInstance, &tmp);
	switch (tmp) {
	case 0x07:
		if (eventCounter == 0) {
			++eventCounter;
		}
		break;
	case 0x06:
		//acknowledge
		break;
	case 0x15:
		//not-achnowledge
		break;
	}
	if (eventCounter > 0) {
		VisiGenieEvent[eventCounter - 1] = tmp;
		++eventCounter;
	}
	if (eventCounter == 7) {
		eventCounter = 0;
		handleVisiGenieEvent(VisiGenieEvent, uartInstance);
	}

	//besser; muss in osdrv_uart implementiert werden...
	//UARTCharGetNonBlocking()

	/*	int i;
	 for (i=0; i<29; ++i){
	 if(ackn[i] == 0){
	 ackn[i]=tmp;
	 }
	 }*/
}

Void common_main() {
	UTILsSetBoardType(AM335X_BOARD_TYPE_ICE_V2); // Fix the board type, we only use ice v2

	MMUInit(applMmuEntries); // needed first

#if !defined (EXEC_FROM_IRAM) && !defined (XIP_NOR)
	relocate_reload_code();
	/* Regitser exit handler - this will be executed when BIOS_exit is called */
	System_atexit(exit_handler_app_restart);
#endif
	/* Register millisecond delay function */
	DELAYRegisterMSDelayfn((void*) Task_sleep);

#ifdef XIP_NOR
	Cache_lock ((Ptr)0x08010000,0x8000);
	Cache_wait();
	Cache_lock ((Ptr)0x08018000,0x8000);
	Cache_wait();

	if( AM335X_BOARD_TYPE_ICE == boardType )
	{
		*(( int*) 0x481AC13C) = 0x04000000; //Set GPIO2-26 to enable NOR accesss beyond 128K
	}

	Cache_lock ((Ptr)0x08020000,0x8000);
	Cache_wait();
	Cache_lock ((Ptr)0x08028000,0x8000);
	Cache_wait();
	Cache_lock ((Ptr)0x08030000,0x8000);
	Cache_wait();
	Cache_lock ((Ptr)0x08038000,0x8000);
	Cache_wait();
#else
	Cache_lock((Ptr) 0x40300000, 0x8000);
	Cache_wait();
	Cache_lock((Ptr) 0x40308000, 0x8000);
	Cache_wait();
#ifndef EXEC_FROM_IRAM    
	Cache_lock((Ptr) 0x80000000, 0x8000);
	Cache_wait();
	Cache_lock((Ptr) 0x80008000, 0x8000);
	Cache_wait();
	Cache_lock((Ptr) 0x80010000, 0x8000);
	Cache_wait();
	Cache_lock((Ptr) 0x80018000, 0x8000);
	Cache_wait();
#endif
#endif

	if (AM335X_BOARD_TYPE_IDK == boardType) {
		PinMuxConfig(idkMux);
		/* For Input reading - HVS*/
		McSPIInit(MCSPI_INSTANCE_1, 12, 0, MCSPI_SINGLE_CH, MCSPI_CHANNEL_1);
	} else if ( AM335X_BOARD_TYPE_ICE_V2 == boardType) {
		PinMuxConfig(iceMux);
		PinMuxConfig(ice_v2Mux);

		/* For Input reading - HVS*/
		McSPIInit(MCSPI_INSTANCE_0, 12, 0, MCSPI_SINGLE_CH, MCSPI_CHANNEL_1);
	} else {
		PinMuxConfig(iceMux);
		PinMuxConfig(ice_v1Mux);

		/* For Input reading - HVS*/
		McSPIInit(MCSPI_INSTANCE_1, 12, 1, MCSPI_SINGLE_CH, MCSPI_CHANNEL_0);
	}
	Task_Params taskParamsEcat;
	Task_Params_init(&taskParamsEcat);
	taskParamsEcat.priority = 4;
	//taskParams.stackSize = 1024;
	taskEcatHnd = Task_create(taskEthercat, &taskParamsEcat, NULL);

	Task_Params taskParamsArinc;
	Task_Params_init(&taskParamsArinc);
	taskParamsArinc.priority = 14;
	//taskParams.stackSize = 1024;
	taskArincHnd = Task_create(taskArinc, &taskParamsArinc, NULL);

	Task_Params taskParamsDisplay;
	Task_Params_init(&taskParamsDisplay);
	taskParamsDisplay.priority = 5;
	taskDisplayHnd = Task_create(taskDisplay, &taskParamsDisplay, NULL);

	if ((unsigned char)AM335X_BOARD_TYPE_ICE_V2 == boardType) {
		uartInstance = 4;
		printf("\r\nCall UartOpen...");
		UartOpen(uartInstance, DebugUartISR);
	} else {
		printf("\r\nError: Wrong device type!");
	}

	GPIOInit();
#ifdef DC_SYNC_IRQ_LATENCY_DEBUG
	GPIODirModeSet(SOC_GPIO_1_REGS, SYNC0_HWI_GPIO_NUM, GPIO_DIR_OUTPUT);
#endif
	UTILsTimer2Init();

	if (AM335X_BOARD_TYPE_IDK == boardType) {
		UTILsPowerPWM();
	}

	if (get_app_reload_flag() != 0xAA) {
		ENABLE_PRUSS_ACCESS_FROM_HOST();
		UTILsResetPhys();
		UTILsICSSInit();
		if (AM335X_BOARD_TYPE_ICE_V2 == boardType) {
			PRUSSPinMuxConfig(0x0); // PRUSS pinmuxing
		} else {
			PRUSSPinMuxConfig(0x1); // PRUSS pinmuxing
		}

		//Disable PRUs - This is to ensure PRUs are not running when application is not initialized
		PRUSSDRVPruDisable(0);
		PRUSSDRVPruDisable(1);

		/* Make sure that the PRU_MEM doesn't give a random 0xAA by chance */
		set_app_reload_flag(0);
		DISABLE_PRUSS_ACCESS_FROM_HOST();
	}

#ifndef EXEC_FROM_IRAM
#ifndef NO_UART_MSG_APP
	/*
	 * Skipping this stuff, because we don't need it.
	 if( AM335X_BOARD_TYPE_ICE == boardType )
	 {
	 uartInstance = 5;
	 }
	 else if(AM335X_BOARD_TYPE_IDK == boardType)
	 {
	 uartInstance = 3;
	 }
	 else if(AM335X_BOARD_TYPE_ICE_V2 == boardType)
	 {
	 uartInstance = 3;
	 }

	 UartOpen(uartInstance,NULL);
	 */

#endif
#endif
	//basic sleep implementation, as workaround for power disrutions on the arinc config.
	if(WAIT_WITH_BOOT_PROCESS){
		unsigned int maxIntB = 547483647;
		for (; maxIntB > 0; maxIntB--) {

		}
	}
	initHi3200(0x1);

	Clock_Params clockParams;
	Clock_Handle myClock;

	Error_Block eb;
	sem = Semaphore_create(0, NULL, &eb);
	if (sem == NULL) {
		System_abort("Semaphore create failed");
	}

	Error_init(&eb);
	Clock_Params_init(&clockParams);
	clockParams.period = DELTA;
	clockParams.startFlag = TRUE;
	clockParams.arg = (UArg) 0x5555;

	myClock = Clock_create(txRateHandler, DELTA, &clockParams, &eb);
	if (myClock == NULL) {
		System_abort("Clock create failed");
	}

	initArincUtils();
	initEPUtils();

	opeartion_mode = OP_MODE_EXTENDED;

	clearAllAMT();

	//printf("\r\nClock tickPeriod: %u", Clock_tickPeriod);

	initDisplay(uartInstance);

	BIOS_start();
}

Uint8 isEtherCATDevice(void) {
	Uint32 temp;

	temp = *((Uint32*) 0x44E10604);

	if ((temp & 0x01) && (temp & (1 << 16)) && (temp & (1 << 17))) {
		return 1;
	}

	return 0;

}

#if !defined (EXEC_FROM_IRAM) && !defined (XIP_NOR)
/* 
 * Runtime firmware upgrade related code -  This feature is supported only
 * on Debug and Release builds as of now 
 */
extern void* app_reload_code_start;
extern void* app_reload_code_size;
extern void* app_reload_code_run;
/*
 - Relocate application reload code to a location so that future application download will not overwrite this.
 - This need to be called from the main function
 */
void relocate_reload_code() {
	Uint32 itr = 0;
	Uint32 len = (Uint32) &app_reload_code_size;
	Uint32 * src = (Uint32 *) &app_reload_code_start;
	Uint32 * dest = (Uint32 *) &app_reload_code_run;

	for (itr = 0; itr < len; itr++) {
		dest[itr] = src[itr];
	}
}
#endif

 

The header is saved in the memory ranging from  0x800404b8 to 0x80048d23.

And the above code overwrites from 0x800404b8 to 0x800412cf during the iteration itr = 302 to 1204.

I would also like to mention that the "am335x.cmd" was rewritten to enable accessing more memory, the changes are as below

SECTIONS
{
   .init: { boot*(.text)} > 0x80000000 /* make sure we can boot!            */
    GROUP: load > OCMC_SRAM
    {
        .bss:
    }   
    .app_reload_code: { tiesc_appreload.obj(.text) } load > DDR3, run > 0x80040000, align = 0x4
                 LOAD_START(app_reload_code_start)
                 RUN_START(app_reload_code_run)
                SIZE(app_reload_code_size)
   .text: load >> DDR3 align = 0x8000

    .bss_ddr3 : { tiescbsp.obj (.bss:eeprom_cache) } > DDR3
    .cinit: load > DDR3
    .init_array: load > DDR3
    .const: load >> DDR3
    .fardata: load >> DDR3
    .switch: load >> DDR3
    .data: load >> DDR3
    .stack: load >> DDR3
    .sysmem: load > DDR3
    .far: load >> DDR3
    .args: load > DDR3 align = 0x4, fill = 0 {_argsize = 0x0; }
    .cio: load >> DDR3
    ti.sysbios.family.arm.a8.mmuTableSection: load >> SRAM_HI, type = NOINIT
    .vecs: load > DDR3
    xdc.meta: load >> DDR3, type = COPY
    tiesc.debugSection: > 0x80030000
}

 

Original was,

 

SECTIONS
{
   .init: { boot*(.text)} > 0x80000000 /* make sure we can boot!            */
    GROUP: load > OCMC_SRAM
    {
        .bss:
        .data:
        .stack:
    }   
    .app_reload_code: { -lsys_bios_driver.lib<osdrv_spiflash.obj,osdrv_mcspi.obj>(.text),-lam335x_platform.lib<plat_delay.obj,plat_mcspi.obj>(.text),tiesc_appreload.obj(.text) } load > DDR3, run > 0x80040000, align = 0x4
                 LOAD_START(app_reload_code_start)
                 RUN_START(app_reload_code_run)
                SIZE(app_reload_code_size)
   .text: load >> DDR3 align = 0x8000

    .bss_ddr3 : { tiescbsp.obj (.bss:eeprom_cache) } > DDR3
    .cinit: load > DDR3
    .init_array: load > DDR3
    .const: load >> DDR3
    .fardata: load >> DDR3
    .switch: load >> DDR3
    .sysmem: load > DDR3
    .far: load >> DDR3
    .args: load > DDR3 align = 0x4, fill = 0 {_argsize = 0x0; }
    .cio: load >> DDR3
    ti.sysbios.family.arm.a8.mmuTableSection: load >> SRAM_HI, type = NOINIT
    .vecs: load > DDR3
    xdc.meta: load >> DDR3, type = COPY
    tiesc.debugSection: > 0x80030000
}

Chester,

Sure, I will do that !

Thanks for your help.