TMS320F28004x Design for timed analog comparison for Interrupt sequencing

Hi Pan,

Can you expand on what exactly you are trying to do? Please be as specific as you can.

OK, to be more precise, i need a continous detection of a 3.3V signal, the best would be this signal that goes to an ADC, but not obligatory..
For example, if this signal reaches a value between 1.2V and 1.4V for a duration between 0,5µs and 1µs, it triggers an interrupt.

Hmm, ok. This should be doable. I think there are multiple ways to skin this animal but one approach that comes to mind right now is using the CMPSS in combination with the OUTPUTXBAR and ECAP modules.

Since you are trying to generate an event when a voltage is between 2 levels, you would have to use the CMPSS as a window trip where the low comparator is set to trip when the voltage crosses 1.2v and high comparator trips when the voltage crosses 1.4v.

These 2 trip events are sent to the ECAP module through the OUTPUTXBAR. The first event creates a time-stamp. The second event also creates a time-stamp but then also generates the interrupt. Within the interrupt, your code looks at the time-stamp delta to see if it meets the timing criteria. For this approach, the decision is made by software.

I think this should also be possible using the CMPSS and EPWM and making the decision in hardware but i'll have to think about that a little more.

Thank you for your reply, it is exactly the solution i was looking for.
To clear it up:
You propose to have the interrupt generated on the second event. Is it possible to also trigger the interrupt when the time stamp is getting bigger than my 1µs? I am just wondering in case the signal is in the good range (between 1.2 and 1.4 ) for more than my maximum timing window.

Going deeper into details, i was searching through the CMPSS and found there's a digital filter which applies a sampling window to the output of the comparator , that maybe i could use as my timing window...
I also discovered there is a comparison hysteresis at the input, that i may use for my analog voltage window, making everything, bu i have no idea of the precision of the hysteresis (it says X times typical..)
Do you think with a100Mhz clock this digital window and comparison hysteresis could do the trick?

Further more, as it could be used for hardware protection, do you think we could interact directly with the PWM outputs and open them up in case the comparison is valid?

Thank you very much,
PA N.

Going through the sequence of events, these are the possible corner case events i can think of:
i. 1.2v trip doesn't happen. If 1.2v trip doesn't happen, then 1.4v trip also doesn't happen because the voltage will have to cross 1.2v first.
ii. 1.2v trip happens but 1.4v doesn't happen.
- For the 2 cases above, doesn't happen means it takes a long time. A 'long time' will overflow the ECAP counter. You can enable overflow event as an additional interrupt source. Unfortunately, you are bound by the 32-bit timer which must elapse before the OVF event occurs. That can take a while. Another approach will be to generate the interrupt on event 1 and wait for some 'max' time. After the 'max' time elapses, you can check if event 2 happened then proceed accordingly.

Yes, there is a digital filter on the output of the comparator. The main purpose of this is to filter out noisy trips. It has a prescaler so should satisfy most timing requirements. To use the filter for timing, you'll have to reset it after every decision because the filter is FIFO and it decides what the output should be based on what's in the window at any given time.
Similar to the filter, hysteresis is meant to mitigate noise and not really for window tripping. More importantly though, the comparator itself has no interrupt generation capability so i don't think this will work. However, if you can think of a case where it will work, I'll be interested in knowing.

If the decision should cause the EPWM to do something, then going through the EPWM might be better. Let me think about that approach a bit and get back to you.

Hello Franck, thanks for the reply.

first of all, i think i gonna have to rewrite my scenario because if the signal is in the good range for 1µs, then i need to have an IT or event triggered.

Hence i cant wait to get an overflow, and i cant have an interrupt unless the signal is already good for 1µs. 

So the 2 corner cases are a big problem for me.

This is why i m looking more deeply into the "digital filter". It's more or less what we want... filter out noise.. But you say it s workling as a FIFO which needs reset if already triggered.. do you mean if a faulty detection occurs then the filter is not cleared?  Or once a valid detection is performed, we need to reset?

Secondly, do you have any specification for the hystérésis, i have learnt that my signal is going to be 70mV wide and not 200mV as i thougth, finally again more like noise filtering, than real comparison with 2 levels. 

To enhance my architecture, i d like to have a counter triggered by the signal "being in the valid range for 1µs", counter that would trigger my IT... 

Thank you for your support, it s a great help!

  

PA N.

Hello,

I tried and wrote you an answer but no idea what happened to it.
So i m rewriting it...

First of all, i d like to have all the "detection of a valid signal during 1µs "to be completely hardware, software should only be involved once this condition is reached.

Therefore, the use of the digital filter seems to be adequate though i m worried about your sentence:
"To use the filter for timing, you'll have to reset it after every decision because the filter is FIFO and it decides what the output should be based on what's in the window at any given time."
Does this mean if a faulty signal triggers the filter, a good signal cant be detected unless the filter is reset?

More over i learnt my signal is going to be 70mV wide (around 1,5V), wondering if the hystérésis may be enough, i cant find any reference of its width...

Finally the best for me would be : "once this signal has reached its voltage window(70mV), during its timing window (1µs) then start a timestamp that finally triggers an IT...."
So our idea here is set the hystérésis to an acceptable level to be sure and detect a 70mV signal around 1,5V, set the digital filter to cope a 1µs time, set the output top a ouptubarX that triggers a timestamp, and wait for trigger from time stamp....

Do you see more issues with our appoach?

Thank you very much!
PA N.

Hi PA N,

I don’t know what the input signal will look like but going by your earlier description, let’s assume it is a triangle wave of 3.3v pk-pk. The voltage range of interest (roi): 1.2v <-> 1.4v will be crossed twice, on ramp-up and ramp-down. The frequency of the triangle wave determines how quickly the roi is crossed. From my understanding of your description, you only want a trigger to be generated if the roi is crossed within a specific time duration. All other events are don’t care? The following description is with the assumption all other events are don’t care.

On ramp-up, either the signal reaches 1.2v or it doesn’t. If it doesn’t reach 1.2v, you don’t do anything. If it reaches 1.2v then you need to start timing. This is where ECAP EVT1 comes in. EVT1 generates the interrupt and within the interrupt, you wait for 1us (adjusted for interrupt latency, etc). After the 1us elapses, you check if any other events happened. If no other events happened, then you proceed with action on good roi. If any other events happened such as crossing 1.4v, you need to check the time to see if it violated the 1us requirement. Other things could have also happened such as the signal dipping back below 1.2v. You can code all those as events and check them all for any violations.

On ramp-down, the reverse happens. Timing starts when the signal dips below 1.4v, that now becomes EVT1.

The cmpss filter is for filtering out noise and doesn’t really have a concept of ‘time’. For instance, let’s assume at time 0, the filter is reset, the comparator output is 0, the window is 12 and threshold is 10. When the signal crosses 1.2v, the filter starts filling up with 1s. Assuming the signal isn’t noisy, after 10 clks, the output of the comparator changes to 1. You can use this trip then to cause an interrupt using the EPWM, input xbar or ECAP. The problem you’ll have is, the filter will still be filling with 1s even if the signal crosses the good range. You’ll also need to reset the filter to start a valid counting again.

Yes, we have a specification for hysteresis in the data manual. The maximum is about 40mV. What the hysteresis does is to prevent an untrip condition after a trip if the signal is noisy for a maximum of about 40mV.

 

I’m working with another co-worker to figure out how this can be accomplished with the ePWM and it looks like there might be a way. I’ll follow up once I have more details. In the mean time, can you provide a better description of your input signal and which events for you are don’t care and which ones are?

Thank you for the amazing work Franck.

Sorry, i m not so precise on my description, i m getting information bit by bit by my hardware team.

Here the latest update:

The signal is an emf that we want to use for a sensorless motion control on a synchronous motor...

The signal goes from 3.0 V to 0V, we want to trigger in the midrange which is some 100mV around 1.5V.

As the frequency depends on the speed, (from 100ms to 100µs), the more filtering is performed by the DSP harwdware the best it is.

We know that our signal is stabile for 2µs at highsest speed and for 80µs at slowest speed. If we cant have this confirmation the signal is considered not valid.

It s a very noising signal due to the chopping at 25KHz.

I like your proposal , but i m worried about false detection triggering an IT. but i just need to be convinced. ;)

I find the approach of the digital filter not so bad after all, even if definitely not so safe as your method.

Thank you very much for the support, i hope i could clarify my problem...

  

Hi PA N,

Got it. Since your application is sensor-less motor control, my suggestion is that whatever you are trying to do is most likely already been done. Not sure of the Instaspin status for F280049 but i think for most of our sensor-less motor applications, the back EMF is read with the ADC.

Looks like you already started another post about synchronous motor control -> e2e.ti.com/.../662479. One of our motor control experts will address your questions in that post so I'm going to go ahead and mark this post as resolved. You can always create another post if you have anymore questions.

Hi Franck,

Sorry but you did not understand me good, the motor control question is one part where i m looking into how TI is designing its motor control, and where i m looking how to design with Instapin...
the other part, this post, is our application where i m looking for answer on how to use the CMPSS to perform the control we designed.
The 2 posts are different and should stay different.

Thank you,
PA .N

P AN,

Yes, right on all counts. Don't worry, the green button worked.