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Hi ,
I was able to debug the AM3517 kernel/drivers on CCSv4(BH-560M) but only with assembler (steping /breakpoints / memory access).
How can I see the AM3517 proccesoer many registers and debug with C code?
Thanks,
Ofer
Assuming you have the kernel source tree and have compiled it with debugging info enabled, you just need to do a "Load symbols ..." for the vmlinux image. If vmlinux is in the default location in the source tree, CCS should automatically be able to locate all the source files.
You might also want to consider giving the CCSv5 LR release a try. There have been some bug fixes in the symbol area in v5 that are applicable to Linux kernel debugging.
Hi Andy,
Now I can see symbols and stepping in C code.
But it seems that the memory access is not working for me, that all memory set to 0xBAD0BAD0.
Also Is there any script that show the AM3517 registers with all the descriptions and values for each module.
Thanks,
Ofer
It is likely the memory you are trying to view is not mapped by the MMU. What are you trying to view?
I'm not aware of a script that will print all the regsiters with descriptions and values. There are many, many registers so the list would be very long. You can expand all groups in the register view and then copy the view contents to the clipboard to get the list of registers in a text file. One thing to note though: there is a bug where the register view uses physical addresses of memory mapped registers but it does not bypass the MMU. This will be fixed in the next v5 release.
The v5 wiki has the download links for ccsv5. The downloads are temporarily offline as I write this, but shoudl be back very soon.
Hi Andy,
I have managed to work with CCSv5 but still memory access is not visible.
I attached the configuration file and the GEL file.
Thanks,
Ofer
menuitem "evm_am3517" //StartUp() //{ // Do nothing //} OnTargetConnect() { Startup_Sequence(); } OnFileLoaded() { GEL_Reset(); GEL_Restart(); } OnReset() { // Do nothing } OnRestart() { // Do nothing } hotmenu Startup_Sequence() { /* GEL_Reset(); */ GEL_MapOff(); GEL_MapReset(); MemoryMap_Init(); GEL_MapOn(); GEL_TextOut("EVM AM3517 Startup Sequence Complete\n"); } MemoryMap_Init() { /* !! FOLLOWING MEM SPACE TO BE CONFIGURED PROPERLY !! */ GEL_MapAddStr(0x00000000, 0, 0x40000000, "R|W", 0); /* GPMC */ GEL_MapAddStr(0x40200000, 0, 0x4020FFFF, "R|W", 0); /* GPMC */ /* L4-peripheral memory space mapping --------------------------------------*/ GEL_MapAddStr(0x48002000, 0, 0x00001000, "R|W|AS4", 0); /* system control - module */ GEL_MapAddStr(0x48003000, 0, 0x00001000, "R|W|AS4", 0); /* system control - L4 interconnect */ GEL_MapAddStr(0x48004000, 0, 0x00002000, "R|W|AS4", 0); /* CM - module Region A */ GEL_MapAddStr(0x48006000, 0, 0x00000800, "R|W|AS4", 0); /* CM - module Region B */ GEL_MapAddStr(0x48007000, 0, 0x00001000, "R|W|AS4", 0); /* CM - L4 interconnect * GEL_MapAddStr(0x4804FC00, 0, 0x00000400, "R|W|AS4", 0); /* DSI */ GEL_MapAddStr(0x48050000, 0, 0x00000400, "R|W|AS4", 0); /* DISPLAY subsystem - Display Subsystem Top */ GEL_MapAddStr(0x48050400, 0, 0x00000400, "R|W|AS4", 0); /* DISPLAY subsystem - Display Controller (DISP) */ GEL_MapAddStr(0x48050800, 0, 0x00000400, "R|W|AS4", 0); /* DISPLAY subsystem - Remote Frame Buffer Interface (RFBI)*/ GEL_MapAddStr(0x48050C00, 0, 0x00000400, "R|W|AS1", 0); /* DISPLAY subsystem - Video encoder (VENC) */ GEL_MapAddStr(0x48051000, 0, 0x00001000, "R|W|AS4", 0); /* DISPLAY subsystem - L4 interconnect */ GEL_MapAddStr(0x48056000, 0, 0x00001000, "R|W|AS4", 0); /* SDMA - module (L3) */ GEL_MapAddStr(0x48057000, 0, 0x00001000, "R|W|AS4", 0); /* SDMA - L4 interconnect */ GEL_MapAddStr(0x48058000, 0, 0x00001000, "R|W|AS4", 0); /* SSI - SSI Top (ssi_func.doc)*/ GEL_MapAddStr(0x48059000, 0, 0x00001000, "R|W|AS4", 0); /* SSI - SSI GDD (ssi_func.doc)*/ GEL_MapAddStr(0x4805A000, 0, 0x00001000, "R|W|AS4", 0); /* SSI - SSI Port1 (ssi_func.doc)*/ GEL_MapAddStr(0x4805B000, 0, 0x00001000, "R|W|AS4", 0); /* SSI - SSI Port2 (ssi_func.doc)*/ GEL_MapAddStr(0x4805C000, 0, 0x00001000, "R|W|AS4", 0); /* SSI - L4 interconnect */ GEL_MapAddStr(0x4805E000, 0, 0x00001000, "R|W|AS4", 0); /* FS USB - module (L3) (usb_otg_func.doc)*/ GEL_MapAddStr(0x4805F000, 0, 0x00001000, "R|W|AS4", 0); /* FS USB - L4 interconnect */ GEL_MapAddStr(0x48060000, 0, 0x00001000, "R|W|AS2", 0); /* I2C3 - module (msi2cocp_func.doc)*/ GEL_MapAddStr(0x48061000, 0, 0x00001000, "R|W|AS2", 0); /* I2C3 - L4 interconnect */ GEL_MapAddStr(0x4806A000, 0, 0x00001000, "R|W|AS1", 0); /* UART1 - module */ GEL_MapAddStr(0x4806B000, 0, 0x00001000, "R|W|AS2", 0); /* UART1 - L4 interconnect */ GEL_MapAddStr(0x4806C000, 0, 0x00001000, "R|W|AS1", 0); /* UART2 - module */ GEL_MapAddStr(0x4806D000, 0, 0x00001000, "R|W|AS2", 0); /* UART2 - L4 interconnect */ GEL_MapAddStr(0x48070000, 0, 0x00001000, "R|W|AS2", 0); /* I2C1 - module (msi2cocp_func.doc)*/ GEL_MapAddStr(0x48071000, 0, 0x00001000, "R|W|AS2", 0); /* I2C1 - L4 interconnect */ GEL_MapAddStr(0x48072000, 0, 0x00001000, "R|W|AS2", 0); /* I2C2 - module (msi2cocp_func.doc)*/ GEL_MapAddStr(0x48073000, 0, 0x00001000, "R|W|AS2", 0); /* I2C2 - L4 interconnect */ GEL_MapAddStr(0x48074000, 0, 0x00001000, "R|W|AS4", 0); /* McBSP1 - module */ GEL_MapAddStr(0x48075000, 0, 0x00001000, "R|W|AS4", 0); /* McBSP1 - L4 interconnect */ GEL_MapAddStr(0x48086000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER10 - module */ GEL_MapAddStr(0x48087000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER10 - L4 interconnect */ GEL_MapAddStr(0x48088000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER11 - module */ GEL_MapAddStr(0x48089000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER11 - L4 interconnect */ GEL_MapAddStr(0x48092000, 0, 0x00001000, "R|W|AS2", 0); /* FAC - module (fac_ocp_func.doc)*/ GEL_MapAddStr(0x48093000, 0, 0x00001000, "R|W|AS2", 0); /* FAC - L4 interconnect */ GEL_MapAddStr(0x48094000, 0, 0x00001000, "R|W|AS4", 0); /* MAILBOX - module (Mailboxes_func.doc)*/ GEL_MapAddStr(0x48095000, 0, 0x00001000, "R|W|AS4", 0); /* MAILBOX - L4 interconnect */ GEL_MapAddStr(0x48096000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP5 (Digital for MIDI)- module */ GEL_MapAddStr(0x48097000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP5 (Digital for MIDI)- L4 interconnect */ GEL_MapAddStr(0x48098000, 0, 0x00001000, "R|W|AS4", 0); /* SPI1 - module (mcspiocp_func.doc)*/ GEL_MapAddStr(0x48099000, 0, 0x00001000, "R|W|AS4", 0); /* SPI1 - L4 interconnect */ GEL_MapAddStr(0x4809A000, 0, 0x00001000, "R|W|AS4", 0); /* SPI2 - module (mcspiocp_func.doc)*/ GEL_MapAddStr(0x4809B000, 0, 0x00001000, "R|W|AS4", 0); /* SPI2 - L4 interconnect */ GEL_MapAddStr(0x4809C000, 0, 0x00001000, "R|W|AS4", 0); /* HS-MMC/SDIO1 - module (mmcsdioocp_func.doc)*/ GEL_MapAddStr(0x4809D000, 0, 0x00001000, "R|W|AS4", 0); /* HS-MMC/SDIO1 - L4 interconnect */ GEL_MapAddStr(0x4809E000, 0, 0x00001000, "R|W|AS4", 0); /* MS_PRO - module used for UART4 */ GEL_MapAddStr(0x4809F000, 0, 0x00001000, "R|W|AS4", 0); /* MS_PRO - used for UART4 L4 interconnect */ GEL_MapAddStr(0x480A0000, 0, 0x00001000, "R|W|AS4", 0); /* RNG - module (rng_func.doc)*/ GEL_MapAddStr(0x480A1000, 0, 0x00001000, "R|W|AS4", 0); /* RNG - L4 interconnect */ GEL_MapAddStr(0x480A2000, 0, 0x00001000, "R|W|AS4", 0); /* DES3DES1 - module (des_func.doc)*/ GEL_MapAddStr(0x480A3000, 0, 0x00001000, "R|W|AS4", 0); /* DES3DES1 - L4 interconnect */ GEL_MapAddStr(0x480A4000, 0, 0x00001000, "R|W|AS4", 0); /* SHA1MD5 1 - module */ GEL_MapAddStr(0x480A5000, 0, 0x00001000, "R|W|AS4", 0); /* SHA1MD5 1 - L4 interconnect */ GEL_MapAddStr(0x480A6000, 0, 0x00001000, "R|W|AS4", 0); /* AES1 - module (aes_func.doc)*/ GEL_MapAddStr(0x480A7000, 0, 0x00001000, "R|W|AS4", 0); /* AES1 - L4 interconnect */ GEL_MapAddStr(0x480A8000, 0, 0x00002000, "R|W|AS4", 0); /* PKA - module (pka_func.doc)*/ GEL_MapAddStr(0x480AA000, 0, 0x00001000, "R|W|AS4", 0); /* PKA - L4 interconnect */ GEL_MapAddStr(0x480AB000, 0, 0x00001000, "R|W|AS4", 0); /* USB 2.0 High speed - module*/ GEL_MapAddStr(0x480AC000, 0, 0x00001000, "R|W|AS4", 0); /* USB 2.0 High speed - L4 Interconnect*/ GEL_MapAddStr(0x480B0000, 0, 0x00001000, "R|W|AS4", 0); /* MG - module */ GEL_MapAddStr(0x480B1000, 0, 0x00001000, "R|W|AS4", 0); /* MG - L4 interconnect */ GEL_MapAddStr(0x480B2000, 0, 0x00001000, "R|W|AS4", 0); /* HDQ (1 wire) - module (hdq1wocp_func.doc)*/ GEL_MapAddStr(0x480B3000, 0, 0x00001000, "R|W|AS4", 0); /* HDQ (1 wire) - L4 interconnect */ GEL_MapAddStr(0x480B4000, 0, 0x00001000, "R|W|AS4", 0); /* HS-MMC/SDIO2 - module (mmcsdioocp_func.doc)*/ GEL_MapAddStr(0x480B5000, 0, 0x00001000, "R|W|AS4", 0); /* HS-MMC/SDIO2 - L4 interconnect */ GEL_MapAddStr(0x480B8000, 0, 0x00001000, "R|W|AS4", 0); /* SPI3 - module (mcspiocp_func.doc)*/ GEL_MapAddStr(0x480B9000, 0, 0x00001000, "R|W|AS4", 0); /* SPI3 - L4 interconnect */ GEL_MapAddStr(0x480BA000, 0, 0x00001000, "R|W|AS4", 0); /* SPI4 - module (mcspiocp_func.doc)*/ GEL_MapAddStr(0x480BB000, 0, 0x00001000, "R|W|AS4", 0); /* SPI4 - L4 interconnect */ GEL_MapAddStr(0x480B6000, 0, 0x00001000, "R|W|AS4", 0); /* ICR ARM11 Access- module */ GEL_MapAddStr(0x480B7000, 0, 0x00001000, "R|W|AS4", 0); /* ICR ARM11 Access - L4 interconnect */ GEL_MapAddStr(0x480BC000, 0, 0x00004000, "R|W|AS4", 0); /* CAMERA ISP - Camera Top (camera_func.doc)*/ GEL_MapAddStr(0x480C0000, 0, 0x00001000, "R|W|AS4", 0); /* CAMERA ISP - L4 interconnect */ GEL_MapAddStr(0x480C1000, 0, 0x00001000, "R|W|AS4", 0); /* DES3DES2 - module (des_func.doc)*/ GEL_MapAddStr(0x480C2000, 0, 0x00001000, "R|W|AS4", 0); /* DES3DES2 - L4 interconnect */ GEL_MapAddStr(0x480C3000, 0, 0x00001000, "R|W|AS4", 0); /* SHA1MD5 2 - module */ GEL_MapAddStr(0x480C4000, 0, 0x00001000, "R|W|AS4", 0); /* SHA1MD5 2 - L4 interconnect */ GEL_MapAddStr(0x480C5000, 0, 0x00001000, "R|W|AS4", 0); /* AES2 - module (aes_func.doc)*/ GEL_MapAddStr(0x480C6000, 0, 0x00001000, "R|W|AS4", 0); /* AES2 - L4 interconnect */ GEL_MapAddStr(0x480C7000, 0, 0x00001000, "R|W|AS4", 0); /* Modem INterrupt Handler - Module*/ GEL_MapAddStr(0x480C8000, 0, 0x00001000, "R|W|AS4", 0); /* Modem INterrupt Handler - L4 Interconnect*/ GEL_MapAddStr(0x480C9000, 0, 0x00001000, "R|W|AS4", 0); /* Smart Reflex1 - Module*/ GEL_MapAddStr(0x480CA000, 0, 0x00001000, "R|W|AS4", 0); /* Smart Reflex1 - L4 Interconnect*/ GEL_MapAddStr(0x480CB000, 0, 0x00001000, "R|W|AS4", 0); /* Smart Reflex2 - Module*/ GEL_MapAddStr(0x480CC000, 0, 0x00001000, "R|W|AS4", 0); /* Smart Reflex2 - L4 Interconnect*/ GEL_MapAddStr(0x480CD000, 0, 0x00001000, "R|W|AS4", 0); /* ICR ARM9 Access - module */ GEL_MapAddStr(0x480CE000, 0, 0x00001000, "R|W|AS4", 0); /* ICR ARM9 Access - L4 interconnect */ GEL_MapAddStr(0x480CF000, 0, 0x00001000, "R|W|AS4", 0); /* CPFROM -module */ GEL_MapAddStr(0x480D0000, 0, 0x00001000, "R|W|AS4", 0); /* CPFROM -module - L4 interconnect */ GEL_MapAddStr(0x48200000, 0, 0x00001000, "R|W|AS4", 0); /* INTC - accessible from CortexA8 ICECrusher only when ARM in secure mode*/ GEL_MapAddStr(0x48280000, 0, 0x00001000, "R|W|AS4", 0); /* SSM - same comments as above */ GEL_MapAddStr(0x48304000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER12 - module */ GEL_MapAddStr(0x48305000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER12 - L4 interconnect */ GEL_MapAddStr(0x48306000, 0, 0x00002000, "R|W|AS4", 0); /* PRCM - module Region A */ GEL_MapAddStr(0x48308000, 0, 0x00000800, "R|W|AS4", 0); /* PRCM - module Region B */ GEL_MapAddStr(0x48309000, 0, 0x00001000, "R|W|AS4", 0); /* PRCM - L4 interconnect */ GEL_MapAddStr(0x4830C000, 0, 0x00001000, "R|W|AS4", 0); /* WDTIMER1 module _Secure_ */ GEL_MapAddStr(0x4830D000, 0, 0x00001000, "R|W|AS2", 0); /* WDTIMER1 L4 interconnect */ GEL_MapAddStr(0x48310000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO1 module (quadgpio.doc)*/ GEL_MapAddStr(0x48311000, 0, 0x00001000, "R|W|AS4", 0); /* Quad GPIO top (OCP splitter) (quadgpio.doc)*/ GEL_MapAddStr(0x48314000, 0, 0x00001000, "R|W|AS4", 0); /* WDTIMER 2 module */ GEL_MapAddStr(0x48315000, 0, 0x00001000, "R|W|AS4", 0); /* WDTIMER 2 L4 interconnect */ GEL_MapAddStr(0x48318000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER1 - module */ GEL_MapAddStr(0x48319000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER1 - L4 interconnect */ GEL_MapAddStr(0x48320000, 0, 0x00001000, "R|W|AS4", 0); /* 32K TIMER - module */ GEL_MapAddStr(0x48321000, 0, 0x00001000, "R|W|AS4", 0); /* 32K TIMER - L4 interconnect */ GEL_MapAddStr(0x49000000, 0, 0x00000800, "R|W|AS4", 0); /* L4_Wakeup Configuration Address/Protection */ GEL_MapAddStr(0x49000800, 0, 0x00000800, "R|W|AS1", 0); /* L4_Wakeup Configuration Initiator port */ GEL_MapAddStr(0x49001000, 0, 0x00001000, "R|W|AS4", 0); /* L4_Wakeup Configuration Link Agent */ GEL_MapAddStr(0x49020000, 0, 0x00001000, "R|W|AS1", 0); /* UART3 - module (uartirdacirocp.doc)*/ GEL_MapAddStr(0x49021000, 0, 0x00001000, "R|W|AS2", 0); /* UART3 - L4 interconnect */ GEL_MapAddStr(0x49022000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP2 - module */ GEL_MapAddStr(0x49023000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP2 - L4 interconnect */ GEL_MapAddStr(0x49024000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP3 (voice BT)- module */ GEL_MapAddStr(0x49025000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP3 (voice BT)- L4 interconnect */ GEL_MapAddStr(0x49026000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP4 (Digital for Modem)- module */ GEL_MapAddStr(0x49027000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP4 (Digital for Modem)- L4 interconnect */ GEL_MapAddStr(0x49028000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP2 - (sidetone) module */ GEL_MapAddStr(0x49029000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP2 - (sidetone) L4 interconnect */ GEL_MapAddStr(0x4902A000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP3 (sidetone)- module */ GEL_MapAddStr(0x4902B000, 0, 0x00001000, "R|W|AS2", 0); /* McBSP3 (sidetone)- L4 interconnect */ GEL_MapAddStr(0x49030000, 0, 0x00001000, "R|W|AS4", 0); /* WdTimer3 - module */ GEL_MapAddStr(0x49031000, 0, 0x00001000, "R|W|AS4", 0); /* WdTimer3 - L4 interconnect */ GEL_MapAddStr(0x49032000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER2 - module */ GEL_MapAddStr(0x49033000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER2 - L4 interconnect */ GEL_MapAddStr(0x49034000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER3 - module */ GEL_MapAddStr(0x49035000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER3 - L4 interconnect */ GEL_MapAddStr(0x49036000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER4 - module */ GEL_MapAddStr(0x49037000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER4 - L4 interconnect */ GEL_MapAddStr(0x49038000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER5 - module */ GEL_MapAddStr(0x49039000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER5 - L4 interconnect */ GEL_MapAddStr(0x4903A000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER6 - module */ GEL_MapAddStr(0x4903B000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER6 - L4 interconnect */ GEL_MapAddStr(0x4903C000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER7 - module */ GEL_MapAddStr(0x4903D000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER7 - L4 interconnect */ GEL_MapAddStr(0x4903E000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER8 - module */ GEL_MapAddStr(0x4903F000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER8 - L4 interconnect */ GEL_MapAddStr(0x49040000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER9 - module */ GEL_MapAddStr(0x49041000, 0, 0x00001000, "R|W|AS4", 0); /* GPTIMER9 - L4 interconnect */ GEL_MapAddStr(0x49050000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO2 module (quadgpio.doc)*/ GEL_MapAddStr(0x49051000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO2 L4 interconnect */ GEL_MapAddStr(0x49052000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO3 module (quadgpio.doc)*/ GEL_MapAddStr(0x49053000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO3 L4 interconnect */ GEL_MapAddStr(0x49054000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO4 module (quadgpio.doc)*/ GEL_MapAddStr(0x49055000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO4 L4 interconnect */ GEL_MapAddStr(0x49056000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO5 - module (quadgpio.doc)*/ GEL_MapAddStr(0x49057000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO5 - L4 interconnect (quadgpio.doc)*/ GEL_MapAddStr(0x49058000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO6 - module (quadgpio.doc)*/ GEL_MapAddStr(0x49059000, 0, 0x00001000, "R|W|AS4", 0); /* GPIO6 - L4 interconnect (quadgpio.doc)*/ GEL_MapAddStr(0x50000000, 0, 0x00010000, "R|W|AS4", 0); /* GFX */ GEL_MapAddStr(0x54004000, 0, 0x00001000, "R|W|AS4", 0); /* TEST-Chip-level TAP - module (chiplevel_tap_func.doc)*/ GEL_MapAddStr(0x54005000, 0, 0x00001000, "R|W|AS4", 0); /* TEST-Chip-level TAP - L4 interconnect */ GEL_MapAddStr(0x5401B000, 0, 0x00001000, "R|W|AS4", 0); /* ARM11ETB - module (etb_mgmt_func.doc)*/ GEL_MapAddStr(0x5401C000, 0, 0x00001000, "R|W|AS4", 0); /* ARM11ETB - L4 interconnect */ /* --new peripherals in Shiva n IVA@ space--------------------------------------*/ GEL_MapAddStr(0x5C000000, 0, 0x00000100, "R|W|AS4", 0); /* CPGMAC -TOP - module*/ GEL_MapAddStr(0x5C010000, 0, 0x00000800, "R|W|AS4", 0); /* CPGMAC - CPGMAC - module*/ GEL_MapAddStr(0x5C020000, 0, 0x00002000, "R|W|AS4", 0); /* CPGMAC - CPPI - module*/ GEL_MapAddStr(0x5C030000, 0, 0x00000100, "R|W|AS4", 0); /* CPGMAC -MDIO - module*/ GEL_MapAddStr(0x5C040000, 0, 0x00008000, "R|W|AS4", 0); /* USBOTGSS - module*/ GEL_MapAddStr(0x5C050000, 0, 0x00004000, "R|W|AS4", 0); /* HECC - module*/ GEL_MapAddStr(0x5C060000, 0, 0x00010000, "R|W|AS4", 0); /* CCDC - module*/ /* !! FOLLOWING MEM SPACE TO BE CONFIGURED PROPERLY !!*/ GEL_MapAddStr(0x68000000, 0, 0x98000000, "R|W" , 0); /* TO BE CONFIGURED */ }
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <configurations XML_version="1.2" id="configurations_0"> <configuration XML_version="1.2" id="Blackhawk USB560-M Emulator, 20-pin JTAG Cable_0"> <instance XML_version="1.2" desc="Blackhawk USB560-M Emulator, 20-pin JTAG Cable_0" href="connections\BH-USB560m_20pin_Connection.xml" id="Blackhawk USB560-M Emulator, 20-pin JTAG Cable_0" xml="BH-USB560m_20pin_Connection.xml" xmlpath="connections"/> <connection XML_version="1.2" id="Blackhawk USB560-M Emulator, 20-pin JTAG Cable_0"> <instance XML_version="1.2" href="drivers\tixds560icepick_c.xml" id="drivers" xml="tixds560icepick_c.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers\tixds560dap_pc.xml" id="drivers" xml="tixds560dap_pc.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers\tixds560cortexA.xml" id="drivers" xml="tixds560cortexA.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers\tixds560cs_child.xml" id="drivers" xml="tixds560cs_child.xml" xmlpath="drivers"/> <platform XML_version="1.2" id="platform_0"> <instance XML_version="1.2" desc="OMAP3503_0" href="Devices\omap3503.xml" id="OMAP3503_0" xml="omap3503.xml" xmlpath="Devices"/> <device HW_revision="1" XML_version="1.2" description="" id="OMAP3503_0" partnum="OMAP3503"> <router HW_revision="1.0" XML_version="1.2" description="ICEPick_C Router" id="IcePick_C_0" isa="ICEPICK_C"> <subpath id="Subpath_0"> <router HW_revision="1.0" XML_version="1.2" description="CS_DAP_PC Router" id="CS_DAP_PC_0" isa="CS_DAP_PC"> <subpath id="Subpath_1"> <cpu HW_revision="1.0" XML_version="1.2" description="Cortex_A8 CPU" id="Cortex_A8_0" isa="Cortex_A8"> <property Type="filepathfield" Value="..\..\..\..\BB_VSM\JTAG\AM35xx\evm_am3517.gel" id="GEL File"/> </cpu> </subpath> </router> </subpath> </router> </device> </platform> </connection> </configuration> </configurations>
I think I may have misunderstood your initial description of the problem. It sounds like you are trying to view groups of memory mapped registers in the memory view, correct? In your attached screenshot, you have 0x48002000 displayed in the memory view (which corresponds to "system control - module").
If that is the case, there are two things to consider. First, the memory view will normally show the CPU view of the system. If the MMU is on, you will see what is mapped by the MMU. You can manually bypass the MMU by going to the Tools -> ARM Advanced Features view and temporarily disabling the MMU. The cache states may come into play when doing this, so care is required.
The other thing to consider is whether a memory mapped register of interest can be displayed in the register view. This would usually be the best option. However, a bug was recently found where CCS was not bypassing the MMU when displaying memory mapped registers in the register view. This will be fixed in the next update, but if this is what you need to do I can provide a patch to workaround the problem.
Hi Andy,
I have tried the MMU disable and still not working.
Please send me the patch for fix the memory access in CCSv5.
Thanks
Ofer
Ofer,
I'm still not sure understand the problem you are experiencing. What are you expecting to see in the memory view?