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Tool/software: Code Composer Studio
Dear Sir,
I am using CCS 7.4 and the controller is TMS320F28234. There is no compilation error but while flashing in console it is showing
C28xx: File Loader: Verification failed: Values at address 0x04000@Program do not match Please verify target memory and memory map. I have verified the the memory mapping and u
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */
RAML0 : origin = 0x008000, length = 0x006000
INTERRUPT_RAM : origin = 0x00E000, length = 0x000020
TZ_INTERRUPT_RAM : origin = 0x00E020, length = 0x000040
TMR_INTER_RAM : origin = 0x00E060, length = 0x000020
ZONE6 : origin = 0x100000, length = 0x100000 /* XINTF zone 6 */
ZONE7 : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
INTERRUPT_FLASH : origin = 0x320000, length = 0x000020 /* on-chip FLASH */
TZ_INTERRUPT_FLASH : origin = 0x320020, length = 0x000040 /* on-chip FLASH */
TMR_INTER_FLASH : origin = 0x320060, length = 0x000020
FLASHH : origin = 0x324040, length = 0x004000
FLASHG : origin = 0x328040, length = 0x004000 /* on-chip FLASH */
FLASHF : origin = 0x32C040, length = 0x004000
FLASHE : origin = 0x330040, length = 0x004000
FLASHD : origin = 0x334040, length = 0x003FC0
FLASHA : origin = 0x338000, length = 0x007F80 /*on-chip FLASH*/
CSM_RSVD : origin = 0x33FF80, length = 0x000076
BEGIN_FLASH : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */
ADC_CAL : origin = 0x380080, length = 0x000009 /* Part of TI OTP */
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 :
RAMM0 : origin = 0x000000, length = 0x000400 /* on-chip RAM block M0 */
BOOT_RSVD : origin = 0x000400, length = 0x000080 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000480, length = 0x000380 /* on-chip RAM block M1 */
RAML4 : origin = 0x00C000, length = 0x001000 /* on-chip RAM block L1 */
RAMIQ : origin = 0x00D000, length = 0x001000 /* on-chip RAM block L1 */
}
/**************************************************************/
/* Link all user defined sections */
/**************************************************************/
SECTIONS
{
/*** Code Security Password Locations ***/
csmpasswds : > CSM_PWL PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
/*** User Defined Sections ***/
codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */
wddisable : > FLASHA, PAGE = 0
copysections : > FLASHA, PAGE = 0
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
/*** Uninitialized Sections ***/
.stack : > RAMM0 PAGE = 1
.ebss : > RAML4 PAGE = 1
.esysmem : > RAML4 PAGE = 1
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
rts2800_FLASH : > FLASHA, PAGE = 0
{
rts2800_ml.lib <boot28.obj> (.text)
}
rts2800_RAM : LOAD = FLASHA, PAGE = 0
RUN = RAML0, PAGE = 0
LOAD_START(_RamFuncs_loadstart),
LOAD_SIZE(_RamFuncs_size),
RUN_START(_RamFuncs_runstart)
{
rts2800_ml.lib <*> (.text)
}
ramfuncs : LOAD = FLASHA, PAGE = 0
RUN = RAML0, PAGE = 0
LOAD_START(_ramFuncs_loadstart),
LOAD_SIZE(_ramFuncs_size),
RUN_START(_ramFuncs_runstart)
{
-l IQmath.lib<IQ24div.obj> (IQmath)
-l IQmath.lib<IQ24toF.obj> (IQmath)
-l IQmath.lib<IQ24atan2PU.obj> (IQmath)
-l IQmath.lib<IQ24sinPU.obj> (IQmath)
-l IQmath.lib<IQ24cosPU.obj> (IQmath)
-l IQmath.lib<IQ20toF.obj> (IQmath)
}
/*** Initialized Sections ***/
.cinit : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_cinit_loadstart),
RUN_START(_cinit_runstart),
SIZE(_cinit_size)
.const : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_const_loadstart),
RUN_START(_const_runstart),
SIZE(_const_size)
.econst : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_econst_loadstart),
RUN_START(_econst_runstart),
SIZE(_econst_size)
.pinit : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_pinit_loadstart),
RUN_START(_pinit_runstart),
SIZE(_pinit_size)
.switch : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_switch_loadstart),
RUN_START(_switch_runstart),
SIZE(_switch_size)
.text : LOAD = FLASHA, PAGE = 0 /* can be ROM */
RUN = RAML0, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_text_loadstart),
RUN_START(_text_runstart),
SIZE(_text_size)
INTERRUPT : LOAD = INTERRUPT_FLASH, PAGE = 0 /* can be ROM */
RUN = INTERRUPT_RAM, PAGE = 0 /* must be CSM secured RAM */
TZ_INTERRUPT : LOAD = TZ_INTERRUPT_FLASH, PAGE = 0 /* can be ROM */
RUN = TZ_INTERRUPT_RAM, PAGE = 0 /* must be CSM secured RAM */
TMR_INTER : LOAD = TMR_INTER_FLASH, PAGE = 0 /* can be ROM */
RUN = TMR_INTER_RAM, PAGE = 0
}
/******************* end of file ************************/
sed the following cmd file.
Could please help me to solve this issue..???
