• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 37 subscribers
  • Views 387 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Switcher Pro VS PSpice Model mismatch_TPS54260

C.K. Gowda
Prodigy 60 points
Other Parts Discussed in Thread: TPS54260

Hi ,

 

Please find the attached Design report (TPS54260) generated using SwitcherPro software.

 

The same circuit I have used to PSpice model the schematic & I could able to get the output Voltage of 14V as expected for duration up to 75 msec.

I have run the PSpice simulation for 100 mSec.

After 75 mSec the output voltage is oscillating between 0V and 14V with square wave.

TPS54260 all the pins waveforms are attached for reference.

SS/TR  pin waveform is equal to the input supply pin waveform. I feel SS/TR  pin and VIN might have shorted in the PSpice model of TPS54260.

Per datasheet of TPS54260 SS/TR pin typical voltage is 1.15V & absolute max is 3V.

 

Please let me know your suggestions what could be wrong.

 

Thanks & Regards4274.Switcher Pro VS PSpice Model mismatch_TPS54260.docx

 

C K Gowda

Rockford, IL, USA

  • 0
    TI__Mastermind 41310 points

    C.K.,

    I have a couple of quick questions about the problem.

    1. Can you tell me what version of PSpice you are using?
    2. The symbol for the TPS54260 in your document looks very different than the symbol provided in TI's product folder. Where did the model for the TPS54260 come from?

    The schematic also showed a VIN label on the SS/TR pin connection and a VIN label on the VIN connection. If you are using the node labeling, these two would be connected, which would explain why the VIN and SS/TR waveforms are identical.

    Thanks for any additional information you can provide.

    Britt

  • 0 in reply to Britt Brooks - Online Design Tools
    Prodigy 60 points

    Britt,

    I am using Cadence Allegro Design Entry HDL Version 16.2.

    Per my understanding we have down loaded the PSpice model from TI website.

    http://focus.ti.com/docs/prod/folders/print/tps54260.html

     

    We have changed the symbol port mapping.

    PSPICETEMPLATE=X^@REFDES %EN %PH %RTCLK %PWRGD %COMP %VIN %VSENSE %BOOT %SSTR %GND @MODEL

     

    VIN Label on SS/TR was unknowingly pasted. I have simulated after removing VIN Label on SS/TR. Now the instability problem is shifted from 75mSec to 91mSec.

    Now the Voltage on  SS/TR  pin is 1.755V up to 91mSec and starts oscillating (Instability) between 0V and 1.755V after 91mSec.

     

    Please help us to fix the problem.

     

    Thanks & Regards

     

    CK

     

  • 0 in reply to C.K. Gowda
    Prodigy 60 points

    Britt,

    Please let us know if you have any updates as early as possible.

     

    Thanks & Regards

    CK Gowda

     

  • 0 in reply to C.K. Gowda
    TI__Mastermind 41310 points

    C. K.,

    I have taken the model off the web and modified it to your schematic (per the word file). I did not see the issues you have reported with the simulation.

    Can you tell me why the pin mapping was changed? Can you tell me why a thermal pad was added? Why is it necessary to run the simulation for 100ms when steady state is reached at 5ms? How long does the simulation take to run?

    I am attaching a .zip file containing the simulation files I used as a guide. the files were created using PSpice 16.2 (Allegro Design Entry 16.2).

    Britt

    3000.TPS54260_PSPICE_TRANS_modified.zip