Tool/software:
Dear TI's team members,
Driving Condition for LV-Buck PWM IC :
Input Voltage = 3.3V
Output Voltage =1.15V
Load Current (max.) = 0.1A ~ 2A
Voltage Ripple = (+/-) 25mV
We uses SIMPLIS Simulation Tooling from TI's SPICE modeling, but phase margin is not enough ( ~35 < 45 ).
So, could you provide us some feedback about this issue ?
Thanks & Best Regards !!

