Part Number: UCC28950
Tool/software:
i have an application for this chip, whereby the current regulation takes priority.
As such, the output voltage can be left floating in a range of 100V - 200V, depending on the load type.
Since most of the calculations in the datasheet and the TI topologies handbook are done with respect to the voltage:
1. How would this PSFB topology fair against a wide output voltage range?
2. If the powerstage values (such as transformer turns ratio, magnetizing inductance, etc) are fixed based on the output voltage, would there be an issue if these parameters stayed constant when output voltage is left unregulated?
Thanks