Tool/software:
Hello,
I'm encountering issues generating a stable design with Webench for the LM70880-Q1. My specifications are:
Webench consistently fails to produce a design with adequate phase margin. I suspect a potential problem with the tool or the device model. Could a TI applications engineer please review this?
Thank you.
Hi Lasse,
The output power (voltage and current) is too high for the LM70880-Q1. This application may need 2 X LM70880-Q1 (dual phase operation) to split the power so the IC can deliver the power without triggering thermal shutdown. Please use the quickstart calculator as an alternative to WEBENCH.
LM70XX0_quickstart_calculator_A1.xlsm
Ben
Hi Ben,
the Excel-based quickstart calculator provides a seemingly valid design, and thermal analysis suggests it's within acceptable limits. I plan to verify this design further using TI PSpice, but I'm currently encountering license download issues, which appear to be affecting other users as well.
My high-current load is periodic with a relatively low duty cycle, which should significantly reduce the actual heat generated by the IC compared to a continuous load scenario.
I have attached my design for your review and would appreciate any comments or feedback you might have.
LM70880-Q1-VIN_58V-VOUT_28V_IOUT_6A.xlsm
Thank you,
Lasse
Hi Lasse,
I would suggest getting our EVM and take bench data to verify the thermals of your application. In my opinion, there is no need to run a simulation on Pspice as the quickstart calculator is pretty accurate on the loop analysis.
Attached is the quickstart calculator. I have made some changes to. The changes are to the inductor value and to the external compensation values.
LM70880-Q1-VIN_58V-VOUT_28V_IOUT_6A_updated.xlsm
Ben
Hi Ben,
I got the TI PSpice installed and now when I try to run a testbench example, I get weird errors (see the end of the snippet) and it aborts. Could you guys please help me?
** Creating circuit file "test.cir" ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS *Libraries: * Profile Libraries : * Local Libraries : .LIB "../../../lm70880.lib" * From [PSPICE NETLIST] section of C:\cds_spb_home\cdssetup\OrCAD_PSpiceTIPSpice_Install\23.1.0\PSpice.ini file: .lib "nom_pspti.lib" .lib "nom.lib" *Analysis directives: .TRAN 0 3.5m 0 .OPTIONS ADVCONV .OPTIONS FILEMODELSEARCH .OPTIONS SPEED_LEVEL= 5 .PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\LM70880 Test Bench.net" **** INCLUDING "LM70880 Test Bench.net" **** * source LM70880-Q1_TRANS R_R12 VDDA N16778820 100k TC=0,0 R_Rload VOUT 0 {VOUT/IOUT} TC=0,0 L_L1 SW ISNS+ 3.3u IC=0 C_C1 N16775823 SW 200n IC=0 TC=0,0 R_R7 VDDA N16776207 100k TC=0,0 C_C2 VOUT 0 47u IC=0 TC=0,0 C_C16 VOUT 0 47u IC=0 TC=0,0 R_R1 0 N16778984 54.9k TC=0,0 C_C3 VCC 0 4.7u IC=0 TC=0,0 R_R3 ISNS+ VOUT 4m TC=0,0 C_C15 VOUT 0 47u IC=0 TC=0,0 C_C17 VOUT 0 47u IC=0 TC=0,0 X_U2 N16776207 N16778820 SW 0 CNFG 0 VDDA VCC VIN N16775823 VIN + N16778984 VOUT FB VDDA ISNS+ LM70880 V_V1 VIN 0 12V R_R20 VDDA FB 24.9k TC=0,0 .PARAM vin=12 iout=8 steady_state=0 vout=5 **** RESUMING test.cir **** .END WARNING(ORPSIM-15256): <X_U2.X_U12_U2.IMAX> not a subcircuit param WARNING(ORPSIM-15256): <X_U2.X_U12_U2.IMIN> not a subcircuit param ERROR(ORPSIM-15461): Incorrect number of interface nodes for X_U2.X_U14_U8. ERROR(ORPSIM-15461): Incorrect number of interface nodes for X_U2.X_U14_U11. ERROR(ORPSIM-15461): Incorrect number of interface nodes for X_U2.X_U14_U10. ERROR(ORPSIM-15461): Incorrect number of interface nodes for X_U2.X_U4_U716. WARNING(ORPSIM-15256): <X_U2.X_U7_U34.DELAY> not a subcircuit param WARNING(ORPSIM-15256): <X_U2.X_U7_U38.DELAY> not a subcircuit param WARNING(ORPSIM-15256): <X_U2.X_U3_U1.IMAX> not a subcircuit param WARNING(ORPSIM-15256): <X_U2.X_U3_U1.IMIN> not a subcircuit param WARNING(ORPSIM-15256): <X_U2.X_U8_U34.DELAY> not a subcircuit param
-Lasse
Hi Lasse,
Are you running PSpice for thermal simulations? I do not see the errors that you are describing. Did you update the PSpice program to the latest version?
Ben
Hi Lasse,
I think the PSpice model for LM70XX0/-Q1 is the older version which has since been updated.
Please download the latest LM70XX0/-Q1 PSpice model.
Ben
Hi Ben
Earlier today I did the exact same thing and downloaded the latest model. This time I was able to start the simulation, but weirdly enough, I get convergence issues even with the example testbench - and the same happens with my own circuitry as well...
I wonder if the problem is in the testbench, in LM70880 model or in my PSpice settings. Could you try to rerun the testbench on your end?
-Lasse
**** 03/28/25 19:04:33 **** PSpice 23.1.0 (30 January 2024) *** ID# 0 ******** ** Profile: "LM70XX0-Q1 Test Bench-transient" [ C:\Users\ljarvela\Downloads\snvmcd7a\LM70XX0-Q1_PSpice_TRANS\lm70xx0-q1_trans-PSpic **** CIRCUIT DESCRIPTION ****************************************************************************** ** Creating circuit file "transient.cir" ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS *Libraries: * Profile Libraries : * Local Libraries : .LIB "../../../lm70xx0-q1.lib" * From [PSPICE NETLIST] section of C:\cds_spb_home\cdssetup\OrCAD_PSpiceTIPSpice_Install\23.1.0\PSpice.ini file: .lib "nom_pspti.lib" .lib "nom.lib" *Analysis directives: .TRAN 0 3m 0 .OPTIONS ADVCONV .OPTIONS FILEMODELSEARCH .PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\LM70XX0-Q1 Test Bench.net" **** INCLUDING "LM70XX0-Q1 Test Bench.net" **** * source LM70XX0-Q1_TRANS R_R12 VDDA N16778820 100k TC=0,0 R_Rload VOUT 0 {VOUT/IOUT} TC=0,0 L_L1 SW ISNS+ 3.3u IC=0 C_C1 N16775823 SW 200n IC=0 TC=0,0 R_R7 VDDA N16776207 100k TC=0,0 C_C2 VOUT 0 47u IC=0 TC=0,0 C_C16 VOUT 0 47u IC=0 TC=0,0 R_R1 0 N16778984 54.9k TC=0,0 C_C3 VCC 0 4.7u IC=0 TC=0,0 R_R3 ISNS+ VOUT 4m TC=0,0 C_C15 VOUT 0 47u IC=0 TC=0,0 C_C17 VOUT 0 47u IC=0 TC=0,0 V_V1 VIN 0 {VIN} R_R20 VDDA FB 24.9k TC=0,0 X_U1 N16776207 N16778820 SW 0 CNFG 0 VDDA VCC VIN N16775823 VIN + N16778984 VOUT FB VDDA ISNS+ LM70XX0-Q1 .PARAM vin=12 iout=8 steady_state=0 vout=5 **** RESUMING transient.cir **** .END **** 03/28/25 19:04:33 **** PSpice 23.1.0 (30 January 2024) *** ID# 0 ******** ** Profile: "LM70XX0-Q1 Test Bench-transient" [ C:\Users\ljarvela\Downloads\snvmcd7a\LM70XX0-Q1_PSpice_TRANS\lm70xx0-q1_trans-PSpic **** INITIAL TRANSIENT SOLUTION TEMPERATURE = 27.000 DEG C ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( FB) 339.9E-06 ( SW) 5.7140 ( VCC) 339.9E-06 ( VIN) 12.0000 ( VDDA) 339.9E-06 ( VOUT) 2.855E-12 (ISNS+) 25.71E-12 (N16775823) 5.7140 (N16776207) 135.9E-09 (N16778820) 341.0E-06 (N16778984) .5000 (X_U1.U5_N16779405) 1.0000 VOLTAGE SOURCE CURRENTS NAME CURRENT V_V1 9.937E-06 TOTAL POWER DISSIPATION -1.19E-04 WATTS Reducing minimum delta to make the circuit converge. Reducing minimum delta to make the circuit converge. Reducing minimum delta to make the circuit converge. Reducing minimum delta to make the circuit converge. ERROR(ORPSIM-15138): Convergence problem in Transient Analysis at Time = 1.313E-03. Time step = 359.1E-21, minimum allowable step size = 1.000E-18 These supply currents failed to converge: I(X_U1.E_U14_ABM6) = 174.62pA \ 181.90pA I(X_U1.E_U7_E2) = -1.907uA \ 5.026pA I(V_V1) = 7.285uA \ 12.44uA Last node voltages tried were: NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( FB) 4.5997 ( SW) -.0370 ( VCC) 4.6000 ( VIN) 12.0000 ( VDDA) 4.5997 ( VOUT) 1.9583 (ISNS+) 1.9731 (N16775823) 4.7134 (N16776207) .0018 (N16778820) 4.5997 (N16778984) .5000 (X_U1.U5_N16779405)-453.7E-24 **** Interrupt ****