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Original question:

TIDA-01022: how to choose sample rate, data rate, and clock source

TIDA-01022: frequency AND function of DCLKout12_P and F_REFCLK1_P

Michael Ma @g
Intellectual 520 points

Part Number: TIDA-01022
Other Parts Discussed in Thread: LMK04828, , LMX2595, LMK61E2

what is the frequency AND function of DCLKout12_P and F_REFCLK1_P?

  • 0
    TI__Expert 4120 points
    Hi Michael,

    Sorry, iam not able to understand your question. could you please explain your little bit better.
  • 0 in reply to Anbu Mani
    Intellectual 520 points
    The U24 (LMK04828) has a 100MHz clock input. what is the Clock Output Frequency of DCLKOUT12P/DCLKOUT12N?
  • 0 in reply to Michael Ma @g
    TI__Expert 4120 points
    Hi Michael,
    LMK04828 clock generation and distribution device with JESD204B compliant clocking , the device has 2 PLL and clock dividers to generate JESD compliant clock up to 7 output pair (DCLK and SYSREF). It can accept the reference clock input from any one of three CLKinX inputs and one OSCinx .

    TIDA-01022 hardware DCLKOUT12P/DCLKOUT12N is connected to FMC+ connector and SMA (J3,J4)connector for future use and at present TIDA-01022 not configure to generate any output at DCLKOUT12P/DCLKOUT12N.

    TIDA-01022 is a flexible hardware platform with various input / outputs options allow customers can evaluate system performance with different clocking scheme , Analog front and power solutions.
    So hardware requires device interface with corresponding configuration file for proper operation.

    Could you please share your top level block diagram and system specification. So i can help with following
    1. How to implement this with our TIDA-01022 hardware
    2. How to choose right clocking options
    3. How to generate programming files for LMK61E2, LMK04828 and LMX2595.

    You can share those information to mail id anbu.ub@ti.com if you have any concern to share those information in this thread