Other Parts Discussed in Thread: TINA-TI,
Tool/software: TINA-TI or Spice Models
Hello,
The UCC28600 PSpice Transient Model is compatible with 17.2 version of PSpice? I get the Convergence error and i don't know how to fix this. I attached the simulation file!
Thanks!
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "simulare_UCC28600.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\SPB_172\cdssetup\OrCAD_PSpice\17.2.0\PSpice.ini file:
.lib "d:\users\F51315C\Desktop\Flyback_simulare\ucc28600.lib"
.lib "nom.lib"
*Analysis directives:
.TRAN 0 50ms 0 1.000E-18
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
**** INCLUDING SCHEMATIC1.net ****
* source UC28600_SIM
Kn_K2 L_L1 L_L2
+ L_L3 0.99
L_L1 N01114 N01018 126u
L_L2 N01024 0 1u
R_R1 N01008 N01018 0.1 TC=0,0
L_L3 0 N01650 10uH
C_C_bulk 0 N01008 1n TC=0,0
X_M1 N01114 N03088 N01569 NAMS20
R_Rcs 0 N01569 0.153 TC=0,0
R_Rvdd VDD N01679 4.20 TC=0,0
C_Cbias 0 N01650 1n TC=0,0
R_Rsu VDD N01008 3.6k TC=0,0
C_Cvdd 0 VDD 3.8u TC=0,0
R_Rovp1 N02272 N01650 97k TC=0,0
R_Rovp2 0 N02272 32k TC=0,0
R_Rpl N03192 N01569 1.8k TC=0,0
R_R2 N02913 N01008 7.6k TC=0,0
C_C1 N02913 N01008 1.3n TC=0,0
X_U1 N03940 FB N03192 0 N03088 VDD N02272 N08897 UCC28600_0
C_C2 VDD 0 100n TC=0,0
X_D5 N01024 N01024 N03620 MUR10005CT
C_CSS 0 N03940 5.5n TC=0,0
C_Cout N05235 N03620 677u TC=0,0
R_Rout 0 N03620 200 TC=0,0
R_R3 0 N05235 1.1m TC=0,0
V_V1 N01008 0 120V
R_R9 FB 0 100G TC=0,0
X_D6 N01650 N01650 N01679 MUR10005CT
X_U2 N01114 N01114 N02913 D1D2C1
R_R10 N08897 0 100G TC=0,0
**** RESUMING simulare_UCC28600.cir ****
.END
**** Generated AtoD and DtoA Interfaces ****
*
* Analog/Digital interface for node X_U1.7
*
* Moving X_U1.XU1.U14:OUT1 from analog node X_U1.7 to new digital node X_U1.7$DtoA
X$X_U1.7_DtoA1
+ X_U1.7$DtoA
+ X_U1.7
+ X_U1.REF
+ 0
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.REF
*
* Moving X_U1.XU1.U10:D1 from analog node X_U1.REF to new digital node X_U1.REF$AtoD
X$X_U1.REF_AtoD1
+ X_U1.REF
+ X_U1.REF$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU1.U10:PREBAR from analog node X_U1.REF to new digital node X_U1.REF$AtoD2
X$X_U1.REF_AtoD2
+ X_U1.REF
+ X_U1.REF$AtoD2
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU1.U15:IN1 from analog node X_U1.REF to new digital node X_U1.REF$AtoD3
X$X_U1.REF_AtoD3
+ X_U1.REF
+ X_U1.REF$AtoD3
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU1.U16:IN1 from analog node X_U1.REF to new digital node X_U1.REF$AtoD4
X$X_U1.REF_AtoD4
+ X_U1.REF
+ X_U1.REF$AtoD4
+ X_U1.REF
+ 0
+ AtoD_LS
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U5:CLRBAR from analog node X_U1.REF to new digital node X_U1.REF$AtoD5
X$X_U1.REF_AtoD5
+ X_U1.REF
+ X_U1.REF$AtoD5
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U10:PREBAR from analog node X_U1.REF to new digital node X_U1.REF$AtoD6
X$X_U1.REF_AtoD6
+ X_U1.REF
+ X_U1.REF$AtoD6
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U11:PREBAR from analog node X_U1.REF to new digital node X_U1.REF$AtoD7
X$X_U1.REF_AtoD7
+ X_U1.REF
+ X_U1.REF$AtoD7
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.U4:IN1 from analog node X_U1.REF to new digital node X_U1.REF$AtoD8
X$X_U1.REF_AtoD8
+ X_U1.REF
+ X_U1.REF$AtoD8
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.U10:D1 from analog node X_U1.REF to new digital node X_U1.REF$AtoD9
X$X_U1.REF_AtoD9
+ X_U1.REF
+ X_U1.REF$AtoD9
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.U10:PREBAR from analog node X_U1.REF to new digital node X_U1.REF$AtoD10
X$X_U1.REF_AtoD10
+ X_U1.REF
+ X_U1.REF$AtoD10
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.OUT_
*
* Moving X_U1.XU14.U1:IN2 from analog node X_U1.OUT_ to new digital node X_U1.OUT_$AtoD
X$X_U1.OUT__AtoD1
+ X_U1.OUT_
+ X_U1.OUT_$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.U10:QBAR1 from analog node X_U1.OUT_ to new digital node X_U1.OUT_$DtoA
X$X_U1.OUT__DtoA1
+ X_U1.OUT_$DtoA
+ X_U1.OUT_
+ X_U1.REF
+ 0
+ DtoA_S
+ PARAMS: DRVH= 72.7 DRVL= 60.6 CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.9
*
* Moving X_U1.U10:Q1 from analog node X_U1.9 to new digital node X_U1.9$DtoA
X$X_U1.9_DtoA1
+ X_U1.9$DtoA
+ X_U1.9
+ X_U1.REF
+ 0
+ DtoA_S
+ PARAMS: DRVH= 72.7 DRVL= 60.6 CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.10
*
* Moving X_U1.U12:IN1 from analog node X_U1.10 to new digital node X_U1.10$AtoD
X$X_U1.10_AtoD1
+ X_U1.10
+ X_U1.10$AtoD
+ X_U1.REF
+ 0
+ AtoD_4000A
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.11
*
* Moving X_U1.U12:IN2 from analog node X_U1.11 to new digital node X_U1.11$AtoD
X$X_U1.11_AtoD1
+ X_U1.11
+ X_U1.11$AtoD
+ X_U1.REF
+ 0
+ AtoD_4000A
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.12
*
* Moving X_U1.U12:IN3 from analog node X_U1.12 to new digital node X_U1.12$AtoD
X$X_U1.12_AtoD1
+ X_U1.12
+ X_U1.12$AtoD
+ X_U1.REF
+ 0
+ AtoD_4000A
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.SS_OVR
*
* Moving X_U1.XU1.U2:IN2 from analog node X_U1.SS_OVR to new digital node X_U1.SS_OVR$AtoD
X$X_U1.SS_OVR_AtoD1
+ X_U1.SS_OVR
+ X_U1.SS_OVR$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU2.U11:IN1 from analog node X_U1.SS_OVR to new digital node X_U1.SS_OVR$AtoD2
X$X_U1.SS_OVR_AtoD2
+ X_U1.SS_OVR
+ X_U1.SS_OVR$AtoD2
+ X_U1.XU2.PWR
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.35
*
* Moving X_U1.U3:IN1 from analog node X_U1.35 to new digital node X_U1.35$AtoD
X$X_U1.35_AtoD1
+ X_U1.35
+ X_U1.35$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.BURST
*
* Moving X_U1.XU1.U2:IN1 from analog node X_U1.BURST to new digital node X_U1.BURST$AtoD
X$X_U1.BURST_AtoD1
+ X_U1.BURST
+ X_U1.BURST$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU14.60
*
* Moving X_U1.XU14.U19:IN1 from analog node X_U1.XU14.60 to new digital node X_U1.XU14.60$AtoD
X$X_U1.XU14.60_AtoD1
+ X_U1.XU14.60
+ X_U1.XU14.60$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU14.61
*
* Moving X_U1.XU14.U18:OUT1 from analog node X_U1.XU14.61 to new digital node X_U1.XU14.61$DtoA
X$X_U1.XU14.61_DtoA1
+ X_U1.XU14.61$DtoA
+ X_U1.XU14.61
+ X_U1.REF
+ 0
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU14.56
*
* Moving X_U1.XU14.U17:IN1 from analog node X_U1.XU14.56 to new digital node X_U1.XU14.56$AtoD
X$X_U1.XU14.56_AtoD1
+ X_U1.XU14.56
+ X_U1.XU14.56$AtoD
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U18:IN1 from analog node X_U1.XU14.56 to new digital node X_U1.XU14.56$AtoD2
X$X_U1.XU14.56_AtoD2
+ X_U1.XU14.56
+ X_U1.XU14.56$AtoD2
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U20:IN2 from analog node X_U1.XU14.56 to new digital node X_U1.XU14.56$AtoD3
X$X_U1.XU14.56_AtoD3
+ X_U1.XU14.56
+ X_U1.XU14.56$AtoD3
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U10:CLRBAR from analog node X_U1.XU14.56 to new digital node X_U1.XU14.56$AtoD4
X$X_U1.XU14.56_AtoD4
+ X_U1.XU14.56
+ X_U1.XU14.56$AtoD4
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U11:CLRBAR from analog node X_U1.XU14.56 to new digital node X_U1.XU14.56$AtoD5
X$X_U1.XU14.56_AtoD5
+ X_U1.XU14.56
+ X_U1.XU14.56$AtoD5
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.Q
*
* Moving X_U1.XU2.U1:IN2 from analog node X_U1.Q to new digital node X_U1.Q$AtoD
X$X_U1.Q_AtoD1
+ X_U1.Q
+ X_U1.Q$AtoD
+ X_U1.XU2.PWR
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.U10:CLK from analog node X_U1.Q to new digital node X_U1.Q$AtoD2
X$X_U1.Q_AtoD2
+ X_U1.Q
+ X_U1.Q$AtoD2
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU2.U3:OUT1 from analog node X_U1.Q to new digital node X_U1.Q$DtoA
X$X_U1.Q_DtoA1
+ X_U1.Q$DtoA
+ X_U1.Q
+ X_U1.XU2.PWR
+ 0
+ DtoA_S
+ PARAMS: DRVH= 72.7 DRVL= 60.6 CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU14.42
*
* Moving X_U1.XU14.U7:IN1 from analog node X_U1.XU14.42 to new digital node X_U1.XU14.42$AtoD
X$X_U1.XU14.42_AtoD1
+ X_U1.XU14.42
+ X_U1.XU14.42$AtoD
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.LINE_OVP
*
* Moving X_U1.XU1.U4:IN2 from analog node X_U1.LINE_OVP to new digital node X_U1.LINE_OVP$AtoD
X$X_U1.LINE_OVP_AtoD1
+ X_U1.LINE_OVP
+ X_U1.LINE_OVP$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.LOAD_OVP
*
* Moving X_U1.XU1.U3:IN1 from analog node X_U1.LOAD_OVP to new digital node X_U1.LOAD_OVP$AtoD
X$X_U1.LOAD_OVP_AtoD1
+ X_U1.LOAD_OVP
+ X_U1.LOAD_OVP$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU2.80
*
* Moving X_U1.XU2.U2:IN1 from analog node X_U1.XU2.80 to new digital node X_U1.XU2.80$AtoD
X$X_U1.XU2.80_AtoD1
+ X_U1.XU2.80
+ X_U1.XU2.80$AtoD
+ X_U1.XU2.PWR
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.CLK_130K
*
* Moving X_U1.XU2.U5:IN3 from analog node X_U1.CLK_130K to new digital node X_U1.CLK_130K$AtoD
X$X_U1.CLK_130K_AtoD1
+ X_U1.CLK_130K
+ X_U1.CLK_130K$AtoD
+ X_U1.XU2.PWR
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU14.U12:IN1 from analog node X_U1.CLK_130K to new digital node X_U1.CLK_130K$AtoD2
X$X_U1.CLK_130K_AtoD2
+ X_U1.CLK_130K
+ X_U1.CLK_130K$AtoD2
+ X_U1.REF
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU2.82
*
* Moving X_U1.XU2.U10:IN2 from analog node X_U1.XU2.82 to new digital node X_U1.XU2.82$AtoD
X$X_U1.XU2.82_AtoD1
+ X_U1.XU2.82
+ X_U1.XU2.82$AtoD
+ X_U1.XU2.PWR
+ 0
+ AtoD_S
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU1.92
*
* Moving X_U1.XU1.U3:IN2 from analog node X_U1.XU1.92 to new digital node X_U1.XU1.92$AtoD
X$X_U1.XU1.92_AtoD1
+ X_U1.XU1.92
+ X_U1.XU1.92$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU1.95
*
* Moving X_U1.XU1.U17:IN2 from analog node X_U1.XU1.95 to new digital node X_U1.XU1.95$AtoD
X$X_U1.XU1.95_AtoD1
+ X_U1.XU1.95
+ X_U1.XU1.95$AtoD
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1.XU1.U12:IN1 from analog node X_U1.XU1.95 to new digital node X_U1.XU1.95$AtoD2
X$X_U1.XU1.95_AtoD2
+ X_U1.XU1.95
+ X_U1.XU1.95$AtoD2
+ X_U1.REF
+ 0
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
*
* Analog/Digital interface for node X_U1.XU1.97
*
* Moving X_U1.XU1.U2:OUT1 from analog node X_U1.XU1.97 to new digital node X_U1.XU1.97$DtoA
X$X_U1.XU1.97_DtoA1
+ X_U1.XU1.97$DtoA
+ X_U1.XU1.97
+ X_U1.REF
+ 0
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
*
* Analog/Digital interface power supply subcircuits
*
X$CD4000_PWR 0 CD4000_PWR
X$DIGIFPWR 0 DIGIFPWR
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Diode MODEL PARAMETERS
******************************************************************************
X_M1.DBD X_D5.dx X_D6.dx X_U2.DD1D2C1
IS 1.000000E-12 325.800000E-12 325.800000E-12 11.760000E-06
N 3.725
ISR 507.500000E-09 507.500000E-09 100.000000E-12
IKF .05519 .05519 1.267
BV 20.1 200
IBV 400.000000E-06
RS .1 5.154000E-03 5.154000E-03 1.000000E-03
TT 50.000000E-09 123.300000E-09 123.300000E-09 5.000000E-09
CJO 1.300000E-09 10.930000E-09 10.930000E-09 1.000000E-12
VJ .38 .75 .75 .75
M .28 .4052 .4052 .3333
D74CLMP D74 D74SCLMP D74S
IS 1.000000E-15 100.000000E-18 10.000000E-12 1.000000E-12
RS 2 25 2 25
CJO 2.000000E-12 2.000000E-12 2.000000E-12 2.000000E-12
VJ .7 .7
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** BJT MODEL PARAMETERS
******************************************************************************
Q74 Q74S
NPN NPN
LEVEL 1 1
IS 100.000000E-18 100.000000E-18
BF 49 49
NF 1 1
ISE 100.000000E-18 100.000000E-18
BR .03 .33
NR 1 1
ISC 400.000000E-18 400.000000E-18
ISS 0 0
RB 50 50
RE 0 0
RC 20 20
CJE 1.000000E-12 1.000000E-12
VJE .9 .9
MJE .5 .5
CJC 500.000000E-15 500.000000E-15
VJC .8 .8
MJC .33 .33
XCJC 1 1
CJS 3.000000E-12 3.000000E-12
VJS .7 .7
MJS .33 .33
TF 200.000000E-12 200.000000E-12
TR 10.000000E-09 10.000000E-09
KF 0 0
AF 1 1
CN 2.42 2.42
D .87 .87
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** MOSFET MODEL PARAMETERS
******************************************************************************
X_M1.NMOS X_M1.PMOS
NMOS PMOS
LEVEL 3 3
TPG -1
L 100.000000E-06 100.000000E-06
W 100.000000E-06 100.000000E-06
VTO 3.208865 -2.137209
KP 16.000000E-06 69.062880E-06
GAMMA 3.503845 1.324329
PHI .896751 .796092
LAMBDA 0 0
RS 4.300000E-03
IS 0 10.000000E-15
JS 0 0
PB .8 .8
PBSW .8 .8
CJ 2.254568E-03 852.146500E-06
CJSW 0 0
CGSO 0 0
CGDO 0 0
CGBO 0 0
NSUB 490.000000E+15 70.000000E+15
NFS 800.000000E+09
TOX 30.000000E-09 30.000000E-09
XJ 500.000000E-09 0
UO 650
UCRIT 10.000000E+03 10.000000E+03
DELTA .1
ETA 100.000000E-06
KAPPA 1.000000E-03
DIOMOD 1 1
VFB 0 0
LETA 0 0
WETA 0 0
U0 0 0
TEMP 0 0
VDD 5 5
XPART 0 0
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Resistor MODEL PARAMETERS
******************************************************************************
X_M1.RTEMP
R 1
TC1 6.500000E-03
TC2 5.500000E-06
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Digital Input MODEL PARAMETERS
******************************************************************************
DIN74 DIN74S
S0NAME 0 0
S0TSW 3.500000E-09 1.500000E-09
S0RLO 7.13 12
S0RHI 389 389
S1NAME 1 1
S1TSW 5.500000E-09 1.500000E-09
S1RLO 467 224
S1RHI 200 74.7
S2NAME X X
S2TSW 3.500000E-09 1.500000E-09
S2RLO 42.9 34.6
S2RHI 116 98.4
S3NAME R R
S3TSW 3.500000E-09 1.500000E-09
S3RLO 42.9 34.6
S3RHI 116 98.4
S4NAME F F
S4TSW 3.500000E-09 1.500000E-09
S4RLO 42.9 34.6
S4RHI 116 98.4
S5NAME Z Z
S5TSW 3.500000E-09 1.500000E-09
S5RLO 200.000000E+03 200.000000E+03
S5RHI 200.000000E+03 200.000000E+03
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Digital Output MODEL PARAMETERS
******************************************************************************
DO74 DO74LS DO74S DO4000A
TIMESTEP 100.000000E-12 100.000000E-12 100.000000E-12 100.000000E-12
S0NAME X X X X
S0VHI 2 2 2 .5
S0VLO .8 .8 .8 -.5
S1NAME 0 0 0 0
S1VHI .8 .8 .8 -.5
S1VLO -1.5 -1.5 -1.5 -3
S2NAME R R R R
S2VHI 1.4 1.2 1.35 .05
S2VLO .8 .8 .8 -.5
S3NAME R R R R
S3VHI 2 2 2 .5
S3VLO 1.3 1.1 1.25 -.05
S4NAME X X X X
S4VHI 2 2 2 .5
S4VLO .8 .8 .8 -.5
S5NAME 1 1 1 1
S5VHI 7 7 7 3
S5VLO 2 2 2 .5
S6NAME F F F F
S6VHI 2 2 2 .5
S6VLO 1.3 1.1 1.25 -.05
S7NAME F F F F
S7VHI 1.4 1.2 1.35 .05
S7VLO .8 .8 .8 -.5
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Digital Gate MODEL PARAMETERS
******************************************************************************
X_U1.XU14.U_SN7432
TPLHMN 6.000000E-09
TPLHTY 15.000000E-09
TPLHMX 24.000000E-09
TPHLMN 8.800000E-09
TPHLTY 22.000000E-09
TPHLMX 35.200000E-09
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Digital Edge Triggered FF MODEL PARAMETERS
******************************************************************************
X_U1.U_SN74AS74
TPCLKQLHMN 2.800000E-09
TPCLKQLHTY 7.000000E-09
TPCLKQLHMX 11.200000E-09
TPCLKQHLMN 3.600000E-09
TPCLKQHLTY 9.000000E-09
TPCLKQHLMX 14.400000E-09
TPPCQLHMN 0
TPPCQLHTY 0
TPPCQLHMX 0
TPPCQHLMN 0
TPPCQHLTY 0
TPPCQHLMX 0
TWCLKLMN 0
TWCLKLTY 0
TWCLKLMX 0
TWCLKHMN 0
TWCLKHTY 0
TWCLKHMX 0
TWPCLMN 0
TWPCLTY 0
TWPCLMX 0
TSUDCLKMN 0
TSUDCLKTY 0
TSUDCLKMX 0
TSUPCCLKHMN 0
TSUPCCLKHTY 0
TSUPCCLKHMX 0
THDCLKMN 0
THDCLKTY 0
THDCLKMX 0
TSUCECLKMN 0
TSUCECLKTY 0
TSUCECLKMX 0
THCECLKMN 0
THCECLKTY 0
THCECLKMX 0
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** Digital IO MODEL PARAMETERS
******************************************************************************
IO_4000A IO_STD IO_S IO_LS
DRVL 1.649000E+03 104 60.6 157
DRVH 1.649000E+03 96.4 72.7 108
AtoD1 AtoD_4000A AtoD_STD AtoD_S AtoD_LS
AtoD2 AtoD_4000A_NX AtoD_STD_NX AtoD_S_NX AtoD_LS_NX
AtoD3 AtoD_4000A AtoD_STD AtoD_S AtoD_LS
AtoD4 AtoD_4000A_NX AtoD_STD_NX AtoD_S_NX AtoD_LS_NX
DtoA1 DtoA_4000A DtoA_STD DtoA_S DtoA_LS
DtoA2 DtoA_4000A DtoA_STD DtoA_S DtoA_LS
DtoA3 DtoA_4000A DtoA_STD DtoA_S DtoA_LS
DtoA4 DtoA_4000A DtoA_STD DtoA_S DtoA_LS
DIGPOWER CD4000_PWR
TSWHL1 7.070000E-09 1.511000E-09 788.000000E-12 2.724000E-09
TSWHL2 6.940000E-09 1.487000E-09 795.000000E-12 2.724000E-09
TSWHL3 9.330000E-09 1.511000E-09 788.000000E-12 2.724000E-09
TSWHL4 9.180000E-09 1.487000E-09 795.000000E-12 2.724000E-09
TSWLH1 8.580000E-09 3.517000E-09 889.000000E-12 2.104000E-09
TSWLH2 8.370000E-09 3.564000E-09 887.000000E-12 2.104000E-09
TSWLH3 10.730000E-09 3.517000E-09 889.000000E-12 2.104000E-09
TSWLH4 10.590000E-09 3.564000E-09 887.000000E-12 2.104000E-09
TPWRT 100.000000E+03 100.000000E+03 100.000000E+03 100.000000E+03
IO_STM
DRVL 0
DRVH 0
DtoA1 DtoA_STM
DtoA2 DtoA_STM
DtoA3 DtoA_STM
DtoA4 DtoA_STM
TPWRT 100.000000E+03
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** INITIAL TRANSIENT SOLUTION TEMPERATURE = 27.000 DEG C
******************************************************************************
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
( FB) 4.8532 ( VDD) 119.9700 (N01008) 120.0000 (N01018) 91.9100
(N01024) 0.0000 (N01114) 91.9100 (N01569) 42.9780 (N01650)-55.51E-18
(N01679) 119.9700 (N02272)-13.77E-18 (N02913) 119.8200 (N03088) .7481
(N03192) 42.9780 (N03620) 0.0000 (N03940) 13.34E-06 (N05235) 0.0000
(N08897) 4.9958 (X_M1.3) 91.9100 (X_U1.7) 3.5008 (X_U1.9) .1496
(X_U1.Q) .1832 ($G_DGND) 0.0000 ($G_DPWR) 5.0000
(X_U1.10) 5.0000 (X_U1.11) 5.0000
(X_U1.12) 5.0000 (X_U1.15) 20.0000
(X_U1.17) 5.4899 (X_U1.18) .1496
(X_U1.24)-2663.8000 (X_U1.31) 43.3780
(X_U1.32) 1.2000 (X_U1.33) 5.335E-06
(X_U1.34) 1.9413 (X_U1.35) 5.0000
(X_U1.REF) 5.0000 (X_U1.OUT_) .1645
(X_U1.BURST) 2.082E-06 (X_U1.FB_CL) 4.8532
(X_U1.OSC_CL) 1.3000 (X_U1.SS_OVR) 5.0000
(X_U1.XOP3.7) 5.6356 (X_U1.XOP3.8) 10.0000
(X_U1.XOP3.9) 5.6356 (X_U1.XPWR.2) 5.0000
(X_U1.XU1.91) 1.2500 (X_U1.XU1.92) 5.0000
(X_U1.XU1.95) 4.164E-06 (X_U1.XU1.97) .0900
(X_U1.XU2.78) 151.7800 (X_U1.XU2.79) 4.0000
(X_U1.XU2.80) 5.0000 (X_U1.XU2.81) .1000
(X_U1.XU2.82) 0.0000 (X_U1.XU21.4) .1496
(X_U1.XU21.5) .1496 (X_U1.XU21.6) 119.9700
(X_U1.XU22.4) .1641 (X_U1.XU22.5) .1641
(X_U1.XU22.6) .1496 (X_U1.XU23.4) .0154
(X_U1.XU23.5) .0154 (X_U1.XU23.6) 42.9780
(X_U1.XOP3.10) 4.8532 (X_U1.XOP3.11) 18.1430
(X_U1.XOP3.12) 1.8570 (X_U1.XU14.40)-13.77E-18
(X_U1.XU14.41) -.1000 (X_U1.XU14.42) .0015
(X_U1.XU14.43) 42.9780 (X_U1.XU14.44)-13.77E-18
(X_U1.XU14.45) 5.000E-09 (X_U1.XU14.46) .4500
(X_U1.XU14.47) 3.7500 (X_U1.XU14.56) 4.9995
(X_U1.XU14.60) .2000 (X_U1.XU14.61) .0908
(X_U1.XU14.64) 50.69E-09 (X_U1.XU14.65) -.0600
(X_U1.XU14.66) 219.3E-06 (X_U1.XU14.67) 9.863E-15
(X_U1.XU14.68) 219.3E-06 (X_U1.XU14.69) 5.0000
(X_U1.XU14.70) 0.0000 (X_U1.XU2.PWR) 5.0000
(X_U1.XU8.108) 20.0000 (X_U1.XU8.109) 20.0000
(X_U1.XU8.110) 20.0000 (X_U1.XU8.111) 2.0000
(X_U1.XU8.112) .9975 (X_U1.XU8.113) 1.9613
(X_U1.XU8.114) 4.1192 (X_U1.XU8.115) .9975
(X_U1.XU8.116) 1.3000 (X_U1.XU8.117) 1.8665
($G_CD4000_VDD) 5.0000 ($G_CD4000_VSS) 0.0000
(X_U1.CLK_130K) 5.0000 (X_U1.LINE_OVP) 0.0000
(X_U1.LOAD_OVP) 0.0000 (X_U1.XOP3.VMI) 0.0000
(X_U1.XOP3.VPI) 20.0000 (X_U1.XPWR.THR) 8.0000
(X_U1.XU1.XU8.2) .0900 (X_U1.XU14.XU8.2) .0015
(X_U1.XU14.XU9.2) 0.0000 (X_U1.XU8.XOP1.7) 1.8960
(X_U1.XU8.XOP1.8) 10.0000 (X_U1.XU8.XOP1.9) 1.8960
(X_U1.XU8.XOP2.7) .9975 (X_U1.XU8.XOP2.8) 10.0000
(X_U1.XU8.XOP2.9) .9975 (X_U1.XU8.XOP3.7) .9975
(X_U1.XU8.XOP3.8) 10.0000 (X_U1.XU8.XOP3.9) .9975
(X$X_U1.Q_AtoD1.1) .3880 (X$X_U1.Q_AtoD1.2) .1940
(X$X_U1.Q_AtoD1.3) .9680 (X$X_U1.Q_AtoD2.1) .3880
(X$X_U1.Q_AtoD2.2) .1940 (X$X_U1.Q_AtoD2.3) .9680
(X_U1.XU8.XOP1.10) 1.3000 (X_U1.XU8.XOP1.11) 18.1430
(X_U1.XU8.XOP1.12) 1.8570 (X_U1.XU8.XOP2.10) 1.9613
(X_U1.XU8.XOP2.11) 18.1430 (X_U1.XU8.XOP2.12) 1.8570
(X_U1.XU8.XOP3.10) 2.0000 (X_U1.XU8.XOP3.11) 18.1430
(X_U1.XU8.XOP3.12) 1.8570 (X$X_U1.35_AtoD1.1) 1.5648
(X$X_U1.35_AtoD1.2) .7824 (X$X_U1.35_AtoD1.3) 2.2862
(X_U1.XU1.XBURST.2) 0.0000 (X_U1.XU1.XU13.104) 5.0000
(X_U1.XU14.XU9.THR) .0100 (X_U1.XU8.XOP1.VMI) 0.0000
(X_U1.XU8.XOP1.VPI) 20.0000 (X_U1.XU8.XOP2.VMI) 0.0000
(X_U1.XU8.XOP2.VPI) 20.0000 (X_U1.XU8.XOP3.VMI) 0.0000
(X_U1.XU8.XOP3.VPI) 20.0000 (X$X_U1.REF_AtoD1.1) 1.5648
(X$X_U1.REF_AtoD1.2) .7824 (X$X_U1.REF_AtoD1.3) 2.2862
(X$X_U1.REF_AtoD2.1) 1.5648 (X$X_U1.REF_AtoD2.2) .7824
(X$X_U1.REF_AtoD2.3) 2.2862 (X$X_U1.REF_AtoD3.1) 1.5648
(X$X_U1.REF_AtoD3.2) .7824 (X$X_U1.REF_AtoD3.3) 2.2862
(X$X_U1.REF_AtoD5.1) 1.5998 (X$X_U1.REF_AtoD5.2) .7999
(X$X_U1.REF_AtoD5.3) 2.1615 (X$X_U1.REF_AtoD6.1) 1.5998
(X$X_U1.REF_AtoD6.2) .7999 (X$X_U1.REF_AtoD6.3) 2.1615
(X$X_U1.REF_AtoD7.1) 1.5648 (X$X_U1.REF_AtoD7.2) .7824
(X$X_U1.REF_AtoD7.3) 2.2862 (X$X_U1.REF_AtoD8.1) 1.5648
(X$X_U1.REF_AtoD8.2) .7824 (X$X_U1.REF_AtoD8.3) 2.2862
(X$X_U1.REF_AtoD9.1) 1.5998 (X$X_U1.REF_AtoD9.2) .7999
(X$X_U1.REF_AtoD9.3) 2.1615 (X$X_U1.OUT__AtoD1.1) .2560
(X$X_U1.OUT__AtoD1.2) .1280 (X$X_U1.OUT__AtoD1.3) .9891
(X$X_U1.REF_AtoD10.1) 1.5998 (X$X_U1.REF_AtoD10.2) .7999
(X$X_U1.REF_AtoD10.3) 2.1615 (X_U1.XU1.XBURST.THR) -.5000
(X$X_U1.10_AtoD1.NORM) 1.2500 (X$X_U1.11_AtoD1.NORM) 1.2500
(X$X_U1.12_AtoD1.NORM) 1.2500 (X$X_U1.BURST_AtoD1.1) .0915
(X$X_U1.BURST_AtoD1.2) .0457 (X$X_U1.BURST_AtoD1.3) .8277
(X$X_U1.SS_OVR_AtoD1.1) 1.5648 (X$X_U1.SS_OVR_AtoD1.2) .7824
(X$X_U1.SS_OVR_AtoD1.3) 2.2862 (X$X_U1.SS_OVR_AtoD2.1) 1.5648
(X$X_U1.SS_OVR_AtoD2.2) .7824 (X$X_U1.SS_OVR_AtoD2.3) 2.2862
(X$X_U1.XU1.92_AtoD1.1) 1.5648 (X$X_U1.XU1.92_AtoD1.2) .7824
(X$X_U1.XU1.92_AtoD1.3) 2.2862 (X$X_U1.XU1.95_AtoD1.1) .0915
(X$X_U1.XU1.95_AtoD1.2) .0457 (X$X_U1.XU1.95_AtoD1.3) .8277
(X$X_U1.XU1.95_AtoD2.1) .0915 (X$X_U1.XU1.95_AtoD2.2) .0457
(X$X_U1.XU1.95_AtoD2.3) .8277 (X$X_U1.XU2.80_AtoD1.1) 1.5648
(X$X_U1.XU2.80_AtoD1.2) .7824 (X$X_U1.XU2.80_AtoD1.3) 2.2862
(X$X_U1.XU2.82_AtoD1.1) .2034 (X$X_U1.XU2.82_AtoD1.2) .1017
(X$X_U1.XU2.82_AtoD1.3) .7861 (X_U1.XU1.XGREENMODE.2) 0.0000
(X$X_U1.XU14.42_AtoD1.1) .2049 (X$X_U1.XU14.42_AtoD1.2) .1025
(X$X_U1.XU14.42_AtoD1.3) .7876 (X$X_U1.XU14.56_AtoD1.1) 1.5998
(X$X_U1.XU14.56_AtoD1.2) .7999 (X$X_U1.XU14.56_AtoD1.3) 2.1615
(X$X_U1.XU14.56_AtoD2.1) 1.5648 (X$X_U1.XU14.56_AtoD2.2) .7824
(X$X_U1.XU14.56_AtoD2.3) 2.2862 (X$X_U1.XU14.56_AtoD3.1) 1.5998
(X$X_U1.XU14.56_AtoD3.2) .7999 (X$X_U1.XU14.56_AtoD3.3) 2.1615
(X$X_U1.XU14.56_AtoD4.1) 1.5998 (X$X_U1.XU14.56_AtoD4.2) .7999
(X$X_U1.XU14.56_AtoD4.3) 2.1615 (X$X_U1.XU14.56_AtoD5.1) 1.5648
(X$X_U1.XU14.56_AtoD5.2) .7824 (X$X_U1.XU14.56_AtoD5.3) 2.2862
(X$X_U1.XU14.60_AtoD1.1) .2915 (X$X_U1.XU14.60_AtoD1.2) .1457
(X$X_U1.XU14.60_AtoD1.3) 1.0240 (X$X_U1.CLK_130K_AtoD1.1) 1.5648
(X$X_U1.CLK_130K_AtoD1.2) .7824 (X$X_U1.CLK_130K_AtoD1.3) 2.2862
(X$X_U1.CLK_130K_AtoD2.1) 1.5998 (X$X_U1.CLK_130K_AtoD2.2) .7999
(X$X_U1.CLK_130K_AtoD2.3) 2.1615 (X$X_U1.LINE_OVP_AtoD1.1) .0915
(X$X_U1.LINE_OVP_AtoD1.2) .0457 (X$X_U1.LINE_OVP_AtoD1.3) .8277
(X$X_U1.LOAD_OVP_AtoD1.1) .0915 (X$X_U1.LOAD_OVP_AtoD1.2) .0457
(X$X_U1.LOAD_OVP_AtoD1.3) .8277 (X_U1.XU1.XGREENMODE.THR) -.5500
(X$X_U1.10_AtoD1.XNORM.THRESHOLD) 1.5000
(X$X_U1.11_AtoD1.XNORM.THRESHOLD) 1.5000
(X$X_U1.12_AtoD1.XNORM.THRESHOLD) 1.5000
DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE
(X_U1.OUT_$AtoD) : 0 (X_U1.XU2.80$AtoD) : 1
(X_U1.XU1.95$AtoD2) : 0 (X_U1.XU1.XU13.105) : 1
(X_U1.XU1.OVR_T) : Z (X_U1.XU1.XU13.106) : 1
(X_U1.QR_DONE) : 0 (X_U1.REF$AtoD2) : 1
(X_U1.10$AtoD) : 1 (X_U1.REF$AtoD7) : 1
(X_U1.XU14.59) : 0 (X_U1.REF_OK_) : 0
(X_U1.XU2.75) : X (X_U1.REF$AtoD8) : 1
(X_U1.CLK_130K$AtoD2) : 1 (X_U1.Q$AtoD) : 0 (X_U1.XU2.76) : Z
(X_U1.XU14.42$AtoD) : 0 (X_U1.XU14.56$AtoD5) : 1
(X_U1.XU14.57) : 1 (X_U1.XU14.56$AtoD) : 1
(X_U1.7$DtoA) : 1 (X_U1.XU14.50) : 0 ( X_U1.8) : 0
(X_U1.XU14.49) : 1 (X_U1.XU2.85) : 1 (X_U1.SS_OVR$AtoD) : 1
(X_U1.Q$AtoD2) : 0 (X_U1.XU2.86) : 1 (X_U1.XU1.97$DtoA) : 0
(X_U1.XU1.XU13.107) : 0 (X_U1.XU1.Q) : 0 (X_U1.XU1.87) : 0
(X_U1.REF$AtoD3) : 1 (X_U1.CLK_130K$AtoD) : 1
(X_U1.XU1.88) : 1 (X_U1.REF$AtoD4) : 1 (X_U1.XU2.82$AtoD) : 0
(X_U1.XU2.72) : X (X_U1.UVLO) : 0 (X_U1.REF$AtoD9) : 1
(X_U1.XU14.62) : 1 (X_U1.XU2.77) : Z ( X_U1.13) : 1
(X_U1.Q$DtoA) : 0 (X_U1.XU14.56$AtoD2) : 1 (X_U1.XU1.100) : 1
(X_U1.12$AtoD) : 1 (X_U1.XU1.93) : 0 (X_U1.XU14.54) : 0
(X_U1.XU1.94) : 0 (X_U1.XU14.51) : 1 (X_U1.35$AtoD) : 1
(X_U1.XU1.99) : 1 (X_U1.XU14.52) : 1 (X_U1.REF$AtoD) : 1
(X_U1.XU1.92$AtoD) : 1 (X_U1.SS_OVR$AtoD2) : 1
(X_U1.XU1.89) : 0 (X_U1.REF$AtoD5) : 1 (X_U1.XU2.73) : 1
(X_U1.REF$AtoD6) : 1 (X_U1.XU14.63) : 1
(X_U1.11$AtoD) : 1 (X_U1.XU14.58) : 0
(X_U1.XU2.74) : 1 (X_U1.XU14.56$AtoD3) : 1 (X_U1.XU1.101) : X
(X_U1.XU1.90) : 1 (X_U1.XU14.55) : 0 (X_U1.OUT_$DtoA) : 1
(X_U1.LOAD_OVP$AtoD) : 0 (X_U1.XU14.56$AtoD4) : 1
(X_U1.XU1.102) : 0 (X_U1.XU2.83) : 0 (X_U1.XU1.96) : 0
( X_U1.23) : 1 (X_U1.XU14.53) : 1
(X_U1.LINE_OVP$AtoD) : 0 (X_U1.9$DtoA) : 0 (X_U1.REF$AtoD10) : 1
(X_U1.BURST$AtoD) : 0 (X_U1.XU14.48) : 1
(X_U1.XU2.84) : 0 (X_U1.XU14.60$AtoD) : 0
(X_U1.XU14.61$DtoA) : 0 (X_U1.XU1.95$AtoD) : 0
(X_U1.RUN) : 0
VOLTAGE SOURCE CURRENTS
NAME CURRENT
V_V1 -2.809E+02
X_U1.V3 -1.333E-03
X_U1.V2 0.000E+00
X_U1.V1 0.000E+00
X_U1.XOP3.Voffs -3.762E-12
X_U1.XOP3.Vc 1.444E-11
X_U1.XOP3.Ve 4.377E-12
X_U1.XU14.V3 0.000E+00
X_U1.XU14.V4 0.000E+00
X_U1.XU14.V2 0.000E+00
X_U1.XU14.V1 -6.929E-14
X_U1.XU14.VS1 -5.041E-03
X_U1.XU14.VCCCS4_IN -1.634E-29
X_U1.XU14.VCCCS2_IN -1.634E-29
X_U1.XU14.VCCCS1_IN 1.634E-29
X_U1.XU2.V4 -1.737E-02
X_U1.XU2.V2 0.000E+00
X_U1.XU2.V1 0.000E+00
X_U1.XU1.V1 0.000E+00
X_U1.XU8.V5 -1.333E-03
X_U1.XU8.V4 -1.333E-03
X_U1.XU8.V3 -1.333E-03
X_U1.XU8.V2 1.474E-06
X_U1.XU8.V1 1.044E-06
X_U1.XU1.XU13.V1 0.000E+00
X_U1.XU8.XOP3.Voffs 1.427E-06
X_U1.XU8.XOP3.Vc 1.980E-11
X_U1.XU8.XOP3.Ve -2.000E-01
X_U1.XU8.XOP2.Voffs 1.079E-06
X_U1.XU8.XOP2.Vc 1.980E-11
X_U1.XU8.XOP2.Ve -2.000E-01
X_U1.XU8.XOP1.Voffs 7.260E-13
X_U1.XU8.XOP1.Vc 1.876E-11
X_U1.XU8.XOP1.Ve 2.842E-14
X$CD4000_PWR.VVDD -5.000E-06
X$CD4000_PWR.VVSS -5.000E-06
X$DIGIFPWR.VDPWR -5.000E-06
X$DIGIFPWR.VDGND -5.000E-06
TOTAL POWER DISSIPATION 3.37E+04 WATTS
Reducing minimum delta to make the circuit converge.
**** 12/19/18 10:36:33 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********
** Profile: "SCHEMATIC1-simulare_UCC28600" [ C:\Desktop\Flyback_simulare\uc28600_sim-pspicefiles\schematic1\simulare_ucc28600.sim ]
**** SIMULATION ERRORS
******************************************************************************
DIGITAL Message ID#1 (SERIOUS):
DIGITAL INPUT VOLTAGE Hazard at time 100ps
Device: X$X_U1.10_AtoD1.O0
Voltage V(X$X_U1.10_AtoD1.NORM,0)= 5.000E+06 is beyond the ranges defined in model DO4000A
DIGITAL Message ID#2 (SERIOUS):
DIGITAL INPUT VOLTAGE Hazard at time 100ps
Device: X$X_U1.11_AtoD1.O0
Voltage V(X$X_U1.11_AtoD1.NORM,0)= 5.000E+06 is beyond the ranges defined in model DO4000A
DIGITAL Message ID#3 (SERIOUS):
DIGITAL INPUT VOLTAGE Hazard at time 100ps
Device: X$X_U1.12_AtoD1.O0
Voltage V(X$X_U1.12_AtoD1.NORM,0)= 5.000E+06 is beyond the ranges defined in model DO4000A
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
ERROR(ORPSIM-15138): Convergence problem in Transient Analysis at Time = 12.50E-15.
Time step = 381.5E-21, minimum allowable step size = 1.000E-18
These supply currents failed to converge:
I(X_U1.EVCV1) = 4.722KA \ 5.044KA
I(X_U1.XU6.EB3) = -2.492A \ -42.49A
I(X_U1.XU7.EB3) = -2.492A \ -42.49A
I(X_U1.XU11.EB3) = -2.492A \ -42.49A
I(X_U1.XU5.EB3) = -326.99uA \ -80.00A
I(X_U1.XU9.EB3) = 30.01A \ 895.18A
I(X_U1.XU2.XU9.EB3) = 2.483A \ 104.26A
I(X_U1.XU2.XU6.EB3) = 4.980A \ 195.83A
I(X_U1.XU2.XU8.EB3) = -2.496A \ -297.86A
I(X_U1.XU1.XU9.EB3) = -306.64uA \ -40.00A
I(X_U1.XU8.XOP1.EGND) = 5.569mA \ 5.582mA
I(V_V1) = -4.113KA \ -9.60MA
I(X_U1.XU14.V1) = -8.640pA \ -59.79fA
These devices failed to converge:
X_D5.d1 X_D5.d2 X_U1.XU14.D1 X_U1.XU14.XU2.D1 X$X_U1.10_AtoD1.D1
X$X_U1.11_AtoD1.D1 X$X_U1.12_AtoD1.D1 X$X_U1.SS_OVR_AtoD1.D0
X$X_U1.SS_OVR_AtoD2.D0 X$X_U1.LINE_OVP_AtoD1.D1 X$X_U1.LINE_OVP_AtoD1.D2
X$X_U1.LOAD_OVP_AtoD1.D1 X$X_U1.LOAD_OVP_AtoD1.D2 X$X_U1.XU1.92_AtoD1.D0
X$X_U1.REF_AtoD1.Q1 X$X_U1.REF_AtoD2.Q1 X$X_U1.REF_AtoD3.Q1
X$X_U1.REF_AtoD5.Q1 X$X_U1.REF_AtoD6.Q1 X$X_U1.REF_AtoD7.Q1
X$X_U1.REF_AtoD8.Q1 X$X_U1.REF_AtoD9.Q1 X$X_U1.REF_AtoD10.Q1
X$X_U1.OUT__AtoD1.Q1 X$X_U1.SS_OVR_AtoD1.Q1 X$X_U1.35_AtoD1.Q1
X$X_U1.BURST_AtoD1.Q1 X$X_U1.XU14.60_AtoD1.Q1 X$X_U1.XU14.56_AtoD1.Q1
X$X_U1.XU14.56_AtoD2.Q1 X$X_U1.XU14.56_AtoD3.Q1 X$X_U1.XU14.56_AtoD4.Q1
X$X_U1.XU14.56_AtoD5.Q1 X$X_U1.Q_AtoD1.Q1 X$X_U1.Q_AtoD2.Q1
X$X_U1.XU14.42_AtoD1.Q1 X$X_U1.LINE_OVP_AtoD1.Q1 X$X_U1.LOAD_OVP_AtoD1.Q1
X$X_U1.XU2.80_AtoD1.Q1 X$X_U1.CLK_130K_AtoD1.Q1 X$X_U1.CLK_130K_AtoD2.Q1
X$X_U1.XU2.82_AtoD1.Q1 X$X_U1.XU1.92_AtoD1.Q1 X$X_U1.XU1.95_AtoD1.Q1
X$X_U1.XU1.95_AtoD2.Q1
Last node voltages tried were:
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
( FB) .4498 ( VDD) 95.31E-09 (N01008) 120.0000 (N01018) 120.0000
(N01024)-22.24E-09 (N01114) -43.4850 (N01569) -92.8870 (N01650)-356.9E-06
(N01679) 119.9000 (N02272)-46.00E-12 (N02913) 119.9600 (N03088) -115.6400
(N03192) 11.6870 (N03620)-6.654E-09 (N03940) 157.9E-12 (N05235)-6.654E-09
(N08897) 4.9958 (X_M1.3) -43.4850 (X_U1.7) .2721 (X_U1.9) 16.8090
(X_U1.Q) .1528 ($G_DGND) 0.0000 ($G_DPWR) 5.0000
(X_U1.10) 5.0000 (X_U1.11) 5.0000
(X_U1.12) 5.0000 (X_U1.15) 20.0000
(X_U1.17) 12.0740 (X_U1.18) -23.1280
(X_U1.24)-2663.8000 (X_U1.31) 12.0870
(X_U1.32) 1.2000 (X_U1.33) 63.17E-12
(X_U1.34) 4.5750 (X_U1.35) 903.0E-06
(X_U1.REF) 0.0000 (X_U1.OUT_) 6.3632
(X_U1.BURST) 43.21E-06 (X_U1.FB_CL) 11.4380
(X_U1.OSC_CL) 9.8522 (X_U1.SS_OVR) 5.0000
(X_U1.XOP3.7) 10.0000 (X_U1.XOP3.8) 10.0000
(X_U1.XOP3.9) 10.0000 (X_U1.XPWR.2) 0.0000
(X_U1.XU1.91) 1.2500 (X_U1.XU1.92) 5.0000
(X_U1.XU1.95) 43.10E-06 (X_U1.XU1.97) 31.70E-06
(X_U1.XU2.78) 2.269E-09 (X_U1.XU2.79) 4.0000
(X_U1.XU2.80) 0.0000 (X_U1.XU2.81) .1000
(X_U1.XU2.82) 5.0000 (X_U1.XU21.4) 17.1780
(X_U1.XU21.5) -77.9510 (X_U1.XU21.6) 17.2590
(X_U1.XU22.4) 2.1202 (X_U1.XU22.5) 6.3471
(X_U1.XU22.6) 1.1910 (X_U1.XU23.4) 11.4460
(X_U1.XU23.5) -21.3870 (X_U1.XU23.6) 12.5590
(X_U1.XOP3.10) .4498 (X_U1.XOP3.11) 18.1430
(X_U1.XOP3.12) 1.8570 (X_U1.XU14.40)-46.00E-12
(X_U1.XU14.41) -.1000 (X_U1.XU14.42) 922.3E-09
(X_U1.XU14.43) 11.6870 (X_U1.XU14.44)-46.00E-12
(X_U1.XU14.45)-3.680E-06 (X_U1.XU14.46) .4500
(X_U1.XU14.47) 3.7500 (X_U1.XU14.56) 3.7717
(X_U1.XU14.60) .0062 (X_U1.XU14.61) 757.0E-09
(X_U1.XU14.64) 772.8E-06 (X_U1.XU14.65) -.0592
(X_U1.XU14.66) 992.1E-06 (X_U1.XU14.67) 17.79E-06
(X_U1.XU14.68) 992.1E-06 (X_U1.XU14.69) 5.0000
(X_U1.XU14.70) 0.0000 (X_U1.XU2.PWR) 5.0000
(X_U1.XU8.108) 20.0000 (X_U1.XU8.109) 20.0000
(X_U1.XU8.110) 20.0000 (X_U1.XU8.111) 2.0000
(X_U1.XU8.112) 7.5821 (X_U1.XU8.113) 1.8839
(X_U1.XU8.114) 2.1488 (X_U1.XU8.115) 9.5497
(X_U1.XU8.116) 1.3000 (X_U1.XU8.117) 10.4190
($G_CD4000_VDD) 5.0000 ($G_CD4000_VSS) 0.0000
(X_U1.CLK_130K) 0.0000 (X_U1.LINE_OVP) 0.0000
(X_U1.LOAD_OVP) 0.0000 (X_U1.XOP3.VMI) 0.0000
(X_U1.XOP3.VPI) 20.0000 (X_U1.XPWR.THR) 13.0000
(X_U1.XU1.XU8.2) .0886 (X_U1.XU14.XU8.2) .0015
(X_U1.XU14.XU9.2) 0.0000 (X_U1.XU8.XOP1.7) 10.0000
(X_U1.XU8.XOP1.8) 10.0000 (X_U1.XU8.XOP1.9) 10.0000
(X_U1.XU8.XOP2.7) 10.0000 (X_U1.XU8.XOP2.8) 10.0000
(X_U1.XU8.XOP2.9) 10.0000 (X_U1.XU8.XOP3.7) 10.0000
(X_U1.XU8.XOP3.8) 10.0000 (X_U1.XU8.XOP3.9) 10.0000
(X$X_U1.Q_AtoD1.1) .3783 (X$X_U1.Q_AtoD1.2) .1891
(X$X_U1.Q_AtoD1.3) .9520 (X$X_U1.Q_AtoD2.1) .3641
(X$X_U1.Q_AtoD2.2) .1820 (X$X_U1.Q_AtoD2.3) .9131
(X_U1.XU8.XOP1.10) 1.3000 (X_U1.XU8.XOP1.11) 18.1430
(X_U1.XU8.XOP1.12) 1.8570 (X_U1.XU8.XOP2.10) 1.8839
(X_U1.XU8.XOP2.11) 18.1430 (X_U1.XU8.XOP2.12) 1.8570
(X_U1.XU8.XOP3.10) 2.0000 (X_U1.XU8.XOP3.11) 18.1430
(X_U1.XU8.XOP3.12) 1.8570 (X$X_U1.35_AtoD1.1) 1.1387
(X$X_U1.35_AtoD1.2) .5693 (X$X_U1.35_AtoD1.3) -.6275
(X_U1.XU1.XBURST.2) 5.0000 (X_U1.XU1.XU13.104) 5.0000
(X_U1.XU14.XU9.THR) .0100 (X_U1.XU8.XOP1.VMI) 0.0000
(X_U1.XU8.XOP1.VPI) 20.0000 (X_U1.XU8.XOP2.VMI) 0.0000
(X_U1.XU8.XOP2.VPI) 20.0000 (X_U1.XU8.XOP3.VMI) 0.0000
(X_U1.XU8.XOP3.VPI) 20.0000 (X$X_U1.REF_AtoD1.1) 1.1386
(X$X_U1.REF_AtoD1.2) .5693 (X$X_U1.REF_AtoD1.3) -.6281
(X$X_U1.REF_AtoD2.1) 1.1386 (X$X_U1.REF_AtoD2.2) .5693
(X$X_U1.REF_AtoD2.3) -.6281 (X$X_U1.REF_AtoD3.1) 1.1386
(X$X_U1.REF_AtoD3.2) .5693 (X$X_U1.REF_AtoD3.3) -.6281
(X$X_U1.REF_AtoD5.1) .7818 (X$X_U1.REF_AtoD5.2) .3909
(X$X_U1.REF_AtoD5.3) .5708 (X$X_U1.REF_AtoD6.1) .7818
(X$X_U1.REF_AtoD6.2) .3909 (X$X_U1.REF_AtoD6.3) .5708
(X$X_U1.REF_AtoD7.1) 1.1386 (X$X_U1.REF_AtoD7.2) .5693
(X$X_U1.REF_AtoD7.3) -.6281 (X$X_U1.REF_AtoD8.1) 1.1386
(X$X_U1.REF_AtoD8.2) .5693 (X$X_U1.REF_AtoD8.3) -.6281
(X$X_U1.REF_AtoD9.1) .7818 (X$X_U1.REF_AtoD9.2) .3909
(X$X_U1.REF_AtoD9.3) .5708 (X$X_U1.OUT__AtoD1.1) 1.3881
(X$X_U1.OUT__AtoD1.2) .6940 (X$X_U1.OUT__AtoD1.3) 2.5581
(X$X_U1.REF_AtoD10.1) .7818 (X$X_U1.REF_AtoD10.2) .3909
(X$X_U1.REF_AtoD10.3) .5708 (X_U1.XU1.XBURST.THR) -.5000
(X$X_U1.10_AtoD1.NORM) 5.000E+06 (X$X_U1.11_AtoD1.NORM) 5.000E+06
(X$X_U1.12_AtoD1.NORM) 5.000E+06 (X$X_U1.BURST_AtoD1.1) .0915
(X$X_U1.BURST_AtoD1.2) .0457 (X$X_U1.BURST_AtoD1.3) .7660
(X$X_U1.SS_OVR_AtoD1.1) 1.5648 (X$X_U1.SS_OVR_AtoD1.2) .7824
(X$X_U1.SS_OVR_AtoD1.3) 2.2245 (X$X_U1.SS_OVR_AtoD2.1) 1.5648
(X$X_U1.SS_OVR_AtoD2.2) .7824 (X$X_U1.SS_OVR_AtoD2.3) 2.2862
(X$X_U1.XU1.92_AtoD1.1) 1.5648 (X$X_U1.XU1.92_AtoD1.2) .7824
(X$X_U1.XU1.92_AtoD1.3) 2.2245 (X$X_U1.XU1.95_AtoD1.1) .0915
(X$X_U1.XU1.95_AtoD1.2) .0457 (X$X_U1.XU1.95_AtoD1.3) .7660
(X$X_U1.XU1.95_AtoD2.1) .0915 (X$X_U1.XU1.95_AtoD2.2) .0457
(X$X_U1.XU1.95_AtoD2.3) .7660 (X$X_U1.XU2.80_AtoD1.1) 1.1386
(X$X_U1.XU2.80_AtoD1.2) .5693 (X$X_U1.XU2.80_AtoD1.3) -.5664
(X$X_U1.XU2.82_AtoD1.1) 1.2581 (X$X_U1.XU2.82_AtoD1.2) .6291
(X$X_U1.XU2.82_AtoD1.3) 1.9814 (X_U1.XU1.XGREENMODE.2) 5.0000
(X$X_U1.XU14.42_AtoD1.1) .1902 (X$X_U1.XU14.42_AtoD1.2) .0951
(X$X_U1.XU14.42_AtoD1.3) .7478 (X$X_U1.XU14.56_AtoD1.1) 1.3961
(X$X_U1.XU14.56_AtoD1.2) .6981 (X$X_U1.XU14.56_AtoD1.3) 1.7841
(X$X_U1.XU14.56_AtoD2.1) 1.4270 (X$X_U1.XU14.56_AtoD2.2) .7135
(X$X_U1.XU14.56_AtoD2.3) 1.7592 (X$X_U1.XU14.56_AtoD3.1) 1.3961
(X$X_U1.XU14.56_AtoD3.2) .6981 (X$X_U1.XU14.56_AtoD3.3) 1.7841
(X$X_U1.XU14.56_AtoD4.1) 1.3961 (X$X_U1.XU14.56_AtoD4.2) .6981
(X$X_U1.XU14.56_AtoD4.3) 1.7841 (X$X_U1.XU14.56_AtoD5.1) 1.4270
(X$X_U1.XU14.56_AtoD5.2) .7135 (X$X_U1.XU14.56_AtoD5.3) 1.7592
(X$X_U1.XU14.60_AtoD1.1) .2109 (X$X_U1.XU14.60_AtoD1.2) .1055
(X$X_U1.XU14.60_AtoD1.3) .7923 (X$X_U1.CLK_130K_AtoD1.1) 1.1386
(X$X_U1.CLK_130K_AtoD1.2) .5693 (X$X_U1.CLK_130K_AtoD1.3) -.5664
(X$X_U1.CLK_130K_AtoD2.1) .7818 (X$X_U1.CLK_130K_AtoD2.2) .3909
(X$X_U1.CLK_130K_AtoD2.3) .5708 (X$X_U1.LINE_OVP_AtoD1.1) .0915
(X$X_U1.LINE_OVP_AtoD1.2) .0457 (X$X_U1.LINE_OVP_AtoD1.3) .7659
(X$X_U1.LOAD_OVP_AtoD1.1) .0915 (X$X_U1.LOAD_OVP_AtoD1.2) .0457
(X$X_U1.LOAD_OVP_AtoD1.3) .7659 (X_U1.XU1.XGREENMODE.THR) -.5500
(X$X_U1.10_AtoD1.XNORM.THRESHOLD) 0.0000
(X$X_U1.11_AtoD1.XNORM.THRESHOLD) 0.0000
(X$X_U1.12_AtoD1.XNORM.THRESHOLD) 0.0000
DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE
(X_U1.OUT_$AtoD) : 0 (X_U1.XU2.80$AtoD) : 1
(X_U1.XU1.95$AtoD2) : 0 (X_U1.XU1.XU13.105) : 1
(X_U1.XU1.OVR_T) : Z (X_U1.XU1.XU13.106) : 1
(X_U1.QR_DONE) : 0 (X_U1.REF$AtoD2) : 1
(X_U1.10$AtoD) : 1 (X_U1.REF$AtoD7) : 1
(X_U1.XU14.59) : 0 (X_U1.REF_OK_) : 0
(X_U1.XU2.75) : X (X_U1.REF$AtoD8) : 1
(X_U1.CLK_130K$AtoD2) : 1 (X_U1.Q$AtoD) : 0 (X_U1.XU2.76) : Z
(X_U1.XU14.42$AtoD) : 0 (X_U1.XU14.56$AtoD5) : 1
(X_U1.XU14.57) : 1 (X_U1.XU14.56$AtoD) : 1
(X_U1.7$DtoA) : 1 (X_U1.XU14.50) : 0 ( X_U1.8) : 0
(X_U1.XU14.49) : 1 (X_U1.XU2.85) : 1 (X_U1.SS_OVR$AtoD) : 1
(X_U1.Q$AtoD2) : 0 (X_U1.XU2.86) : 1 (X_U1.XU1.97$DtoA) : 0
(X_U1.XU1.XU13.107) : 0 (X_U1.XU1.Q) : 0 (X_U1.XU1.87) : 0
(X_U1.REF$AtoD3) : 1 (X_U1.CLK_130K$AtoD) : 1
(X_U1.XU1.88) : 1 (X_U1.REF$AtoD4) : 1 (X_U1.XU2.82$AtoD) : 0
(X_U1.XU2.72) : X (X_U1.UVLO) : 0 (X_U1.REF$AtoD9) : 1
(X_U1.XU14.62) : 1 (X_U1.XU2.77) : Z ( X_U1.13) : 1
(X_U1.Q$DtoA) : 0 (X_U1.XU14.56$AtoD2) : 1 (X_U1.XU1.100) : 1
(X_U1.12$AtoD) : 1 (X_U1.XU1.93) : 0 (X_U1.XU14.54) : 0
(X_U1.XU1.94) : 0 (X_U1.XU14.51) : 1 (X_U1.35$AtoD) : 1
(X_U1.XU1.99) : 1 (X_U1.XU14.52) : 1 (X_U1.REF$AtoD) : 1
(X_U1.XU1.92$AtoD) : 1 (X_U1.SS_OVR$AtoD2) : 1
(X_U1.XU1.89) : 0 (X_U1.REF$AtoD5) : 1 (X_U1.XU2.73) : 1
(X_U1.REF$AtoD6) : 1 (X_U1.XU14.63) : 1
(X_U1.11$AtoD) : 1 (X_U1.XU14.58) : 0
(X_U1.XU2.74) : 1 (X_U1.XU14.56$AtoD3) : 1 (X_U1.XU1.101) : X
(X_U1.XU1.90) : 1 (X_U1.XU14.55) : 0 (X_U1.OUT_$DtoA) : 1
(X_U1.LOAD_OVP$AtoD) : 0 (X_U1.XU14.56$AtoD4) : 1
(X_U1.XU1.102) : 0 (X_U1.XU2.83) : 0 (X_U1.XU1.96) : 0
( X_U1.23) : 1 (X_U1.XU14.53) : 1
(X_U1.LINE_OVP$AtoD) : 0 (X_U1.9$DtoA) : 0 (X_U1.REF$AtoD10) : 1
(X_U1.BURST$AtoD) : 0 (X_U1.XU14.48) : 1
(X_U1.XU2.84) : 0 (X_U1.XU14.60$AtoD) : 0
(X_U1.XU14.61$DtoA) : 0 (X_U1.XU1.95$AtoD) : 0
(X_U1.RUN) : 0
**** Interrupt ****
