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TIDA-010042: VDD_3.3V has an intialization issue/ shuts down with dark panels?

Part Number: TIDA-010042

I haven't prototyped this design yet,, but after studying the design the reference Altium project documents for a while, I am not understanding the MCU power scheme.

1. VCC_10V and VDD_3.3V are derived from current sourced from P+ to GND. I can find no source path to the VDD_3.3V regulator from nets B+ or L+ on the PowerStage_Pg3.SchDoc sheet. The firmware initializes P_EN logic low, which turns OFF panel disconnect switch Q4. Current can then no longer flow from P+ to GND because their is not GND path back to the panels with Q4 off. How does the MCU run with no current available to switching regulator U6? I don't understand how the system even starts.

2. Related to item 1, their appears to be no path to power the MCU system from the battery. Did you intend for the MCU system to shut down and disconnect the load from the battery whenever the PV input drops to zero (dark panel)?

Am I missing something?

  • After having studied the buck circuit a bit more, I think I see the current path from battery on J7, pin 2 now. If the panel is disconnected with Q4 off, battery plus current can flow through, in order: R42, R41, L6 and L7, and through the body - drain diodes of Q6 and Q7, and finally R39 to P+. No battery current flows through the panel because P- is disconnected until we read voltage coming in, and intentionally activate P_EN. Interesting how power can flow in either direction on the V_IN net as this was designed!

    Also, the battery ground path for energizing VCC_10V and VDD_3.3V feeding the MCU can be returned through the body - drain diode of Q3.

    Please advise if my above circuit analysis is correct, and that's how it works.

    Cheers,

    Brian Dotson

  • Hi Brian,

    Yes, your circuit analysis is correct. Mostly we miss out on the body diode current path as it is not very obvious. We get free OR'ing on the bias supply!

    Regards,

    Salil