Other Parts Discussed in Thread: BLE-STACK, CC2640
I'm in the process of modifying the BIM included with BLE-Stack 2.1 for an I2C memory instead of SPI. However, when using the I2C master in the cc2640, we are seeing some short-cycling on the SCL output, which is leading to read/write errors and occasionally a stuck bus. It happens at both 100KHz and 400KHz I2C speeds.
Measurement of a normal cycle:
Measurement of the short cycle:
Since it's the boot loader, it's pretty much bare-metal code - single process, plenty of delays to let supplies settle and whatnot. The power supplies look good and stable. I've verified that the cc2640 is configured to use the external LF OSC. Here's what the code in concern looks like:
I2CMasterSlaveAddrSet(BLS_I2C_BASE, 0b1010000, false);// true = about to issue a receive, false= about to issue a write.
I2CMasterDataPut(BLS_I2C_BASE,(addr & 0xFF));// first address word
I2CMasterControl(BLS_I2C_BASE, I2C_MASTER_CMD_BURST_SEND_START);// sends a byte..
while(I2CMasterBusy(BLS_I2C_BASE));
...
Seems straight forward enough. Any ideas what could be causing the glitched clock output from the I2C peripheral?
Thanks,
Art

