Set cache SRAM as normal RAM

Antimatter

Hi,

Is there any information how to set the cache SRAM as normal RAM in IAR? I've enabled it in CCS modify the included CCFG (from appBLE_ccfg.c) and change:

#define SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM 0x1 // Cache is enabled and GPRAM is disabled (unavailable)

#define SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM 0x0 // Cache is disabled and GPRAM is available at 0x11000000-0x11001FFF

After doing this you I've added the GPRAM area as well in the linker file (TOOLS/cc26xx_ble_app.cmd).

#define GPRAM_SIZE 0x2000
#define GPRAM_BASE 0x11000000
...
MEMORY
{
 ...
 GPRAM (RWX) : origin: GPRAM_BASE, length=GPRAM_SIZE
}

SECTIONS

{
...
 .data           :   > SRAM | GPRAM
 .bss            :   > SRAM | GPRAM
 .sysmem         :   > SRAM | GPRAM
}

But how to specify it in the IAR ARM Linker Configuration File cc26xx_ble_app.icf?

over 9 years ago

0 Eirik V over 9 years ago

TI__Guru 56590 points

Hello Peter,
We have -not- tested that this will work with the BLE applications so there are no guarantees that it will. Code from Flash will execute significantly slower,this might cause the BLE stack to fail waking up in time. It can be a beterr idea to optimize your current RAM usage and stick with the 20 KB. In the threads mentioned below there is attached is a script that will visualize the IAR map file and show flash and RAM usage for you which is really helpful when optimizing your application.

This might also not work together with the SNV driver in the BLE SDK (osal_snv.c). With BLE, it will -not- work if you only have 1 SNV flash page as cache is then used for compacting (if defined OSAL_SNV=1, see osal_snv_wrapper.c).

There is a few general threads on the topic already with some more info:
e2e.ti.com/.../413324
e2e.ti.com/.../1669933

Anyways, to your specific question:
I am not certain about how to modify the linker configuration file correctly as I have not tested it myself yet, but by quickly reading the "IAR C/C++ Development Guide Compiling and Linking" from IAR (you can find it in the drop-down help menu in IAR) I think this might work:
define symbol GPRAM_START = 0x11000000;
define symbol GPRAM_END = 0x11001FFF;
define region RAM = mem:[from RAM_START to RAM_END] | mem:[from GPRAM_START to GPRAM_END ];

0 Antimatter over 9 years ago in reply to Eirik V

Intellectual 430 points

OK, thank you for your answer. We would look at it and not to use the option to disable the cache ram.

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Set cache SRAM as normal RAM