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RF430FRL152H: Timer and NFC enable, RF430FRL152H crashes

Part Number: RF430FRL152H
Other Parts Discussed in Thread: , MSP430L092

Tool/software:

Hi there,

We use the NFC sample code: RF430FRL15xH_Projects_v1_5\RF430FRL15xH NFC Projects\RF430FRL152H

The sample code is modified that enables the timer_A0 and ISR counts the numbers.

    CCSCTL4 = SELA_1 + SELM_0 + SELS_0;      // Select VLO for ACLK and select HFCLK/DCO for MCLK, and SMCLK
    CCSCTL5 = DIVA_2 + DIVM_1 + DIVS_1;      // Set the Dividers for ACLK (4), MCLK, and SMCLK to 1
    CCSCTL6 = XTOFF;                         // Turns of the crystal if it is not being used
    CCSCTL8 = ACLKREQEN + MCLKREQEN + SMCLKREQEN; //disable clocks if they are not being used
    TA0CCTL0 = CCIE;                        // Timer A0 Capture/compare interrupt enable
    TA0CTL = TASSEL__ACLK +                 // Timer_A clock source select -> ACLK
                 MC_1 +                     // Mode control, Timer counts up to the value stored in TA0CCR0
                 ID_3;                      // divide 8

	TA0CCR0 = 2000; 

#pragma vector = TIMER0_A0_VECTOR
__interrupt void TimerA0_ISR(void)
{
    nfc_sys_data.timerCnt += 1;

	if(nfc_sys_data.timerCnt >= 1500) {	
		nfc_sys_data.timerCnt = 0;
    }

}

And, the mobile phone contacts the RF430FRL152H with NFC. 

The test scenario: mobile contacts for 60 seconds then off the RF430FRL152H for 30 seconds, repeatedly. (One loop is 90 seconds).


The image shows the current of RF430FRL152H.

The current drops for 60 seconds when the mobile contacts the RF430FRL152H 

The current rises for 30 seconds when the mobile off the RF430FRL152H 

It crashes after testing 13 hours.

Please help if something I misses.

The code is attached.

main_0708_NFC_sample_timer_.c
/*
 * main.c
 *
 * RF430FRL152H NFC Only Example Project
 *
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
 * 
 * 
 *  Redistribution and use in source and binary forms, with or without 
 *  modification, are permitted provided that the following conditions 
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright 
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the 
 *    documentation and/or other materials provided with the   
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
*/

#include "NDEF.h"
#include "types.h"
//#include "patch.h"
#include <rf430frl152h.h>


//*****************************FUNCTION PROTOTYPES********************************/
typedef struct
{
    u16_t ADC0_Buffer;
    u08_t ADC2_Buffer;
    u16_t timerCnt;
    u08_t V_DOUB_time;
    u08_t State;
    u08_t adcProc_Start;
    u08_t V_DOUB_flag;
} nfc_sys_info_t;
void DeviceInit(void);
//********************************************************************************/

static nfc_sys_info_t nfc_sys_data;
/*********************** SUMMARY **************************************************************************************************
 * This project *only* utilizes the RF stack (ISO15693) on the ROM of the RF430FRL15xH. This setup allows the user to make a
 * custom application that is run from FRAM.  Only the RF13M vector that runs the RF stack needs to be pointing to its
 * ROM location.
 */

 /**************************************************************************************************************************************************
*   Code Space
***************************************************************************************************************************************************
*
*  Please check the lnk_rf430frl152h_NFC_Only.cmd file to customize how much code space is used for NDEF message ("FRAM_NDEF")
*  or for code ("FRAM_CODE").  
*
**************************************************************************************************************************************************/

/**************************************************************************************************************************************************
*   Main
***************************************************************************************************************************************************
*
* Brief :		Program entry.
*
* Param[in] :   None
*
*
* Param[out]:   None
*
* Return :
*
**************************************************************************************************************************************************/

void main()
{
	WDTCTL = WDTPW + WDTHOLD;                   // Stop watchdog

    // ROM RF13M module setup ** The following three lines are needed for proper RF stack operation
    DS = 1; 									// ROM variable needs to be initialized here
    asm ( " CALL #0x5CDA "); 					// Call ROM function ( Initialize function pointers)
    asm ( " CALL #0x5CAC "); 					// Call ROM function ( Check part configuration)


	initISO15693(CLEAR_BLOCK_LOCKS);  // clear all block locks
	//initISO15693(0);					// leave block locks as they are set in FRAM

	//JTAG is set to be disabled in this function call
	DeviceInit();

	while(1)
	{
        // Enter application code here...
		__bis_SR_register(LPM3_bits + GIE);
	}

}

/**************************************************************************************************************************************************
*  DeviceInit
***************************************************************************************************************************************************
*
* Brief : Initialize the clock system and other settings
*         Patchable function
*
* Param[in] :   parameters:  has these independent options
*                            INITIALIZE_DEVICE_CLOCK_SYSTEM - initializes the clock system
*                            POPULATE_INTERRUPT_VECTOR_IN_INITIALIZATION - populate the default interrupt vectors and recalculate their CRC
*
* Param[out]:  None
*
* Return  None
*
* Patchable :   Yes
**************************************************************************************************************************************************/
void DeviceInit(void)
{
//	P1SEL0 = 0xF0; //keep JTAG
//	P1SEL1 = 0xF0; //keep JTAG
	P1SEL0 = 0x00; //no JTAG
	P1SEL1 = 0x00; //no JTAG

    P1DIR &= ~0xEF;
    P1REN = 0;

    CCSCTL0 = CCSKEY;                        // Unlock CCS

    CCSCTL1 = 0;                             // do not half the clock speed
    CCSCTL4 = SELA_1 + SELM_0 + SELS_0;      // Select VLO for ACLK and select HFCLK/DCO for MCLK, and SMCLK
    CCSCTL5 = DIVA_2 + DIVM_1 + DIVS_1;      // Set the Dividers for ACLK (4), MCLK, and SMCLK to 1
    CCSCTL6 = XTOFF;                         // Turns of the crystal if it is not being used
    CCSCTL8 = ACLKREQEN + MCLKREQEN + SMCLKREQEN; //disable clocks if they are not being used
    TA0CCTL0 = CCIE;                        // Timer A0 Capture/compare interrupt enable
    TA0CTL = TASSEL__ACLK +                 // Timer_A clock source select -> ACLK
                 MC_1 +                     // Mode control, Timer counts up to the value stored in TA0CCR0
                 ID_3;                      // divide 8

	TA0CCR0 = 2000; // 200
    CCSCTL0_H |= 0xFF;                       // Lock CCS

  return;
}



//#pragma vector = RFPMM_VECTOR
//__interrupt void RFPMM_ISR(void)
//{
//}
//
//#pragma vector = PORT1_VECTOR
//__interrupt void PORT1_ISR(void)
//{
//}
//
//#pragma vector = SD_ADC_VECTOR
//__interrupt void SD_ADC_ISR(void)
//{
//}
//
//#pragma vector = USCI_B0_VECTOR
//__interrupt void USCI_B0_ISR(void)
//{
//}
//#pragma CODE_SECTION(RF13M_ISR, ".fram_driver_code")  // comment this line for using ROM's RF13M ISR, uncomment next one, see .cmd file for details
#pragma CODE_SECTION(RF13M_ISR, ".rf13m_rom_isr") 		// comment this line for creating a custom RF13M ISR that will exist in FRAM, bypassing ROM's, uncomment previous
#pragma vector = RF13M_VECTOR
__interrupt void RF13M_ISR(void)
{
	// Right now this vector is pointing to the ROMs firmware location that runs the RF stack. 
    // Entering code here will, without changing the CODE_SECTION lines
	// above, will cause an error.
    // Changing the code section above will cause the ROM RF stack to be bypassed.  New handler will need to be created.
}

//#pragma vector = WDT_VECTOR
//__interrupt void WDT_ISR(void)
//{
//}
//
//#pragma vector = TIMER0_A1_VECTOR
//__interrupt void TimerA1_ISR(void)
//{
//}
//

#pragma vector = TIMER0_A0_VECTOR
__interrupt void TimerA0_ISR(void)
{
    nfc_sys_data.timerCnt += 1;
	
	if(nfc_sys_data.timerCnt >= 1500) {	
		nfc_sys_data.timerCnt = 0;
    }
}
//__interrupt void TimerA0_ISR(void)
//{
//}
//
//#pragma vector = UNMI_VECTOR
//__interrupt void UNMI_ISR(void)
//{
//}
//
//#pragma vector = SYSNMI_VECTOR
//__interrupt void SysNMI_ISR(void)
//{
//}

lnk_rf430frl152h_NFC_Only.cmd is rename to lnk_rf430frl152h_NFC_Only.cmd.c because of the TI website upload.

lnk_rf430frl152h_NFC_Only.cmd.c
/* ============================================================================ */
/* Copyright (c) 2014, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/******************************************************************************/
/* lnk_rf430frl152h.cmd - LINKER COMMAND FILE FOR LINKING RF430FRL152H PROGRAMS     */
/*                                                                            */
/*   Usage:  lnk430 <obj files...>    -o <out file> -m <map file> lnk.cmd     */
/*           cl430  <src files...> -z -o <out file> -m <map file> lnk.cmd     */
/*                                                                            */
/*----------------------------------------------------------------------------*/
/* These linker options are for command line linking only.  For IDE linking,  */
/* you should set your linker options in Project Properties                   */
/* -c                                               LINK USING C CONVENTIONS  */
/* -stack  0x0100                                   SOFTWARE STACK SIZE       */
/* -heap   0x0100                                   HEAP AREA SIZE            */
/*                                                                            */
/*----------------------------------------------------------------------------*/
/* Version: 1.154    (Beta-Build-Tag: #0011)                                  */
/*----------------------------------------------------------------------------*/

/****************************************************************************/
/* Specify the system memory map                                            */
/****************************************************************************/

MEMORY
{
    SFR                     : origin = 0x0000, length = 0x0010
    PERIPHERALS_8BIT        : origin = 0x0010, length = 0x00F0
    PERIPHERALS_16BIT       : origin = 0x0100, length = 0x0100
    RAM                     : origin = 0x1C00, length = 0x1000

    //ROM ISRs, starting points, length not correct
    RF13M_ROM_ISR			: origin = 0x54D0, length = 0x0002

    //FRAM                    : origin = 0xF840, length = 0x0790
    FRAM                    : origin = 0xF868, length = 0x011E
    FRAM_CODE               : origin = 0xF986, length = 0x064A  // code area, can be increased /  decreased with FRAM, FRAM + FRAM_CODE = 0x768
    JTAGSIGNATURE           : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF
    BSLSIGNATURE            : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF
    INT00                   : origin = 0xFFE0, length = 0x0002
    INT01                   : origin = 0xFFE2, length = 0x0002
    INT02                   : origin = 0xFFE4, length = 0x0002
    INT03                   : origin = 0xFFE6, length = 0x0002
    INT04                   : origin = 0xFFE8, length = 0x0002
    INT05                   : origin = 0xFFEA, length = 0x0002
    INT06                   : origin = 0xFFEC, length = 0x0002
    INT07                   : origin = 0xFFEE, length = 0x0002
    INT08                   : origin = 0xFFF0, length = 0x0002
    INT09                   : origin = 0xFFF2, length = 0x0002
    INT10                   : origin = 0xFFF4, length = 0x0002
    INT11                   : origin = 0xFFF6, length = 0x0002
    INT12                   : origin = 0xFFF8, length = 0x0002
    INT13                   : origin = 0xFFFA, length = 0x0002
    INT14                   : origin = 0xFFFC, length = 0x0002
    RESET                   : origin = 0xFFFE, length = 0x0002
}

/****************************************************************************/
/* Specify the sections allocation into memory                              */
/****************************************************************************/

SECTIONS
{
    GROUP(ALL_FRAM)
    {
       GROUP(READ_WRITE_MEMORY)
       {
          .TI.persistent : {}                /* For #pragma persistent            */
          .cio        : {}                   /* C I/O buffer                      */
          .sysmem     : {}                   /* Dynamic memory allocation area    */
       }

       GROUP(READ_ONLY_MEMORY)
       {
          .cinit      : {}                   /* Initialization tables             */
          .pinit      : {}                   /* C++ constructor tables            */
          .init_array : {}                   /* C++ constructor tables            */
          .mspabi.exidx : {}                 /* C++ constructor tables            */
          .mspabi.extab : {}                 /* C++ constructor tables            */
          .const      : {}                   /* Constant data                     */
       }

       GROUP(EXECUTABLE_MEMORY)
       {
          .text       : {}                   /* Code                              */
       }
    } > FRAM_CODE

    .rf13m_rom_isr		: {} > RF13M_ROM_ISR type = DSECT
    .fram_driver_code		: {} > FRAM_CODE

    .jtagsignature : {} > JTAGSIGNATURE   /* JTAG Signature                    */
    .bslsignature  : {} > BSLSIGNATURE    /* BSL Signature                     */
    .jtagpassword                         /* JTAG Password                     */

    .bss        : {} > RAM                /* Global & static vars              */
    .data       : {} > RAM                /* Global & static vars              */
    .TI.noinit  : {} > RAM                /* For #pragma noinit                */
    .stack      : {} > RAM (HIGH)         /* Software system stack             */

    /* MSP430 Interrupt vectors          */

    .int00       : {}               > INT00
    .int01       : {}               > INT01
    .int02       : {}               > INT02
    .int03       : {}               > INT03
    .int04       : {}               > INT04
    RFPMM        : { * ( .int05 ) } > INT05 type = VECT_INIT
    PORT1        : { * ( .int06 ) } > INT06 type = VECT_INIT
    SD_ADC       : { * ( .int07 ) } > INT07 type = VECT_INIT
    USCI_B0      : { * ( .int08 ) } > INT08 type = VECT_INIT
    ISO          : { * ( .int09 ) } > INT09 type = VECT_INIT
    WDT          : { * ( .int10 ) } > INT10 type = VECT_INIT
    TIMER0_A1    : { * ( .int11 ) } > INT11 type = VECT_INIT
    TIMER0_A0    : { * ( .int12 ) } > INT12 type = VECT_INIT
    UNMI         : { * ( .int13 ) } > INT13 type = VECT_INIT
    SYSNMI       : { * ( .int14 ) } > INT14 type = VECT_INIT
  	.reset       : {}               > RESET  /* MSP430 Reset vector         */
}

/****************************************************************************/
/* Include peripherals memory map                                           */
/****************************************************************************/

-l rf430frl152h.cmd

  • Hi,

      13 hours means close to 520 loops. I don't know the cause for failing. If it fails after 13 hours then I don't tend to think it's a software issue. Can you do a few experiments? 

      Can you repeat the same test on the same board again? Does it always fail after hours of testing ? 

      If you only use the example without any added code, do you see the failure?

      Do you have another board to test? Can you repeat the same failure on another board?

      Can you do a ABA swap test? Swap in new unit. Can you repeat the same failure? 

      Can you repeat the same failure on RF430FRL152HEVM board. I suppose your failure is on your custom board, correct? 

  • Hi Charles,

    Thanks for reply.

    We did some test.

    1. It always fails after hours on the same board.

    2. The two different boards are crashed after hours.

    3. It works well if only run the sample code (NFC sample code: RF430FRL15xH_Projects_v1_5\RF430FRL15xH NFC Projects\RF430FRL152H)

    But, the system fails if enable timer_A0.

    It is any limitation for NFC with the timer?

  • Hi Chris,

     I'm currently out of office. I will get back with your question when I come back next Wednesday. 

  • Hi Chris,

      Sorry for the delay as I just got back. 

      Can you elaborate on the crashing? If you connect to the device with a debugger, what line of code is the processor at? I don't really see a reason why enabling timer would crash the device. If you change the timer period to a larger or smaller value, will that make the crash happen later or sooner? 

  • Hi Charles,

    Thanks for reply.

    We just apply the other clock source (High frequency clock, 4MHz)

    It still crashes after 38 hours.

     CCSCTL0 = CCSKEY;                        // Unlock CCS
    
        CCSCTL1 = 0;                             // do not half the clock speed
        CCSCTL4 = SELA_0 + SELM_0 + SELS_0;      // Select VLO for ACLK and select HFCLK/DCO for MCLK, and SMCLK
        CCSCTL5 = DIVA_5 + DIVM_1 + DIVS_1;      // Set the Dividers for ACLK (4), MCLK, and SMCLK to 1
        CCSCTL6 = XTOFF;                         // Turns of the crystal if it is not being used
        CCSCTL8 = ACLKREQEN + MCLKREQEN + SMCLKREQEN; //disable clocks if they are not being used
        TA0CCTL0 = CCIE;                        // Timer A0 Capture/compare interrupt enable
        TA0CTL = TASSEL__ACLK +                 // Timer_A clock source select -> ACLK
                     MC_1 +                     // Mode control, Timer counts up to the value stored in TA0CCR0
                     ID_1;                      
    
    
    	TA0CCR0 = 15624;
        CCSCTL0_H |= 0xFF;                       // Lock CCS

    Test case: I2C is enabled to shows the log in the timer ISR.

    It shows nothing in the timer ISR. I think that means it crashes before timer ISR, and so that we can not get any message.

    I2C shows 111 and 222, then system crashes. 

    #pragma vector = TIMER0_A0_VECTOR
    __interrupt void TimerA0_ISR(void)
    {
    	ADC_I2C_Write(111);
        nfc_sys_data.timerCnt += 1;
    
    	if(nfc_sys_data.timerCnt >= 1500) {	
    		nfc_sys_data.timerCnt = 0;
        }
    	ADC_I2C_Write(222);
    
    }

  • Hi Chris,

      I still cannot understand why it would fail only after hours and not in the very beginning. If you leave out all code (e.g. NFC code and I2C code) but only keep the timer code, will you still see the same problem? I just wanted to isolate the problem. 

    RF430FRL152H processor is based on MSP430L092. There is a example for Timer at the below link. Can you take a look and see any difference compared to your code. 

    https://dev.ti.com/tirex/nodeContent?node=A__AGXwsAJ6U0aUfj3qaDj5Xg__msp430ware__IOGqZri__LATEST

  • Dear Charles,

    Thanks for reply.

    After some test, we have 2 questions:

    https://dev.ti.com/tirex/nodeContent?node=A__AGXwsAJ6U0aUfj3qaDj5Xg__msp430ware__IOGqZri__LATEST

     

    After we modify the timer divide, system would crash after NFC contact.

     The code is as follows,

    CCSCTL5 = DIVS_0; 

    CCSCTL4 |= SELM_0  + SELS_0 + SELA_0;    // Select LFCLK/VLO as the source for ACLK, MCLK, and SMCLK  

    to

    CCSCTL5 = DIVS_5; 

    void DeviceInit(void)
    {
    	P1SEL0 = 0x00; //no JTAG
    	P1SEL1 = 0x00; //no JTAG
    	
    /*************************/
    /* Setup Ports           */
    /*************************/
      
      	P1OUT |= BIT0;                          // P1.0 output
      	P1DIR |= BIT0 + BIT1;                           
      	P1SEL0 |=  BIT1 ;                
      	P1SEL1 |=  BIT1 ; 
    	
    	
    	// Configure P1.0 and P1.1 pins for I2C mode (mode2)
        PORT_I2C_SEL0 |= SCL + SDA;
        PORT_I2C_SEL1 &= ~(SCL + SDA);
    
        // configure eUSCI for I2C
        UCB0CTL1 |= UCSWRST;                   // Software reset enabled
        UCB0CTLW0 |= UCMODE_3  + UCMST + UCSYNC + UCTR;     // I2C mode, Master mode, sync, transmitter
        UCB0CTLW0 |= UCSSEL_2;                              // select SMCLK at 2MHz
        UCB0BRW = 20;                                       // 2Mhz / 20 = 100kHz
        UCB0I2CSA = 0x0040;                                 // slave address of SHT21, initially
        UCB0CTL1  &= ~UCSWRST;                              // exit reset mode
    	
    	   
        
    /************************/
    /* Setup CCS            */
    /* SMCLK = LFCLK        */
    /************************/
        	CCSCTL0 = CCSKEY;                       // Unlock CCS
        	CCSCTL5 = DIVS_0;                            // Set the Dividers for SMCLK to 1
    		//CCSCTL5 = DIVS_5
    
        	CCSCTL4 |= SELM_0  + SELS_0 + SELA_0;    // Select LFCLK/VLO as the source for ACLK, MCLK, and SMCLK   
    	
    /* Lock by writing to upper byte */
      
      	TA0CCTL0 = CCIE;                        // TA0CCR0 interrupt enabled
      	TA0CCR0 = 1000;				    // Set value for TA0CCR0
    
     	TA0CTL = TASSEL_2 + MC_2 + TACLR;       // SMCLK, cont. mode
    	
    				 
    	CCSCTL0_H |= 0xFF;                      // Lock CCS			 
    	timerCnt_5min_ = 0;			 
    
      return;
    }

  • Hi Chris,

      Are you saying if you set CCSCTL5 = DIVS_0 then there is no crash?

      What about DIVS_1, DIVS_2, DIVS_3, or DIVS_4? I just wanted to know if the problem is only specific to DIVS_5 and not others.

  •   What about DIVS_1, DIVS_2, DIVS_3, or DIVS_4? I just wanted to know if the problem is only specific to DIVS_5 and not others.

    Is there any limitation?

    We hope not to try and error.
    Can you reproduce? Or something I miss to set?

  • Hi Chris,

      Your code shows that you are dividing SMCLK by 5 before passing the divided clock to the timer module.  However, reading the Timer_A user's guide, I think you should pass an undivided SMCLK to the Timer module and use the ID or IDEX registers to further divide the clock before the 16-bit Timer. See below diagram. 

    To achieve the same effect (divide by 5) as what you currently have, can you pass an undivided SMCLK to the timer_A module and then use the TAIDEX register to divide by 5. Will you have the same crashing problem after 30+ hours?

  • Hi Charles,

    Base on the clock tree, SMCLK can choose HF-SOC and divider (1~32).

    We would like to know any limitation for DIVS?

    System would crash after NFC contact 3~ 5 times with DIVS_5.

    It is easy to duplicate.

  • Hi Chris,

      I'm trying to acquire the hardware and debug tool in order to do the testing myself. DIVS_5 is a supported divisor value according to the TRM but I don't know the reason for the crashing. I just wanted to know if you have the same issue for other divisors. Before I acquire the hardware to perform the testing, can you please provide feedback for the following?

     - Does it crash to use DIVS_4 or lower?

     - If you use DIVS_0 as the SMCLK to the Timer_A module and use TAIDEX_4 to divide SMCLK by 5 inside the timer module. Does it crash? This setting should produce the same timeout for your application. 

      - Can you try LF-OSC? The reason that I ask is because the HF-OSC has a much wider tolerance without trimming, see below. I wonder if your crashing is due to wider tolerance on HF. 

     - What if you use LF-OSC for experiment? It has a smaller tolerance compared to HF.