Other Parts Discussed in Thread: CC1120
Dear
I am middle of w m bus implementation on CC1120 at 169 MHz on my develop board FR5739.
To debugging use RF smart studio and TRXEB , TX board and RX board .
Able to transmit valid w m bus packet in Na mode from develop board to RX board , but when receive data from TX board , never get first byte of package on my develop board .
On other side RX board receive all data from TX board .
Use same register setting like RX board , specially :
PKT_CFG 2=0X04 ,
PKT_CFG 1=0X01 ,
PKT_CFG 0=0X00 ,
PKT_LEN = 0X2C ,
sample of data packet :
25 44 08 07 06 05 04 03 02 01 4F 32 78 0a 01 02 03 04 05 06 07 08 09 0b 01 02 03 04 10 66 05 06 07 08 09 0c 01 02 03 04 05 06 3E 5C.
RX board receive all data , but my develop board receive :
44 08 07 06 05 04 03 02 01 4F 32 78 0a 01 02 03 04 05 06 07 08 09 0b 01 02 03 04 10 66 05 06 07 08 09 0c 01 02 03 04 05 06 3E 5C 4B - (last byte is probably junk from FIFO)
try use FIFO_DMA , FIFO_POINTER but have same problem.
I have no idea what is problem .
Please need help ...
thx
