Greetings Forum!
The other day, I came across the text apropos Phase Locked Loop Filter Design for a synchronization task I was conducting for some other project and I realized that we missed a trick or two when we were concerned about the offset in frequency in my following thread:
. I would like to explain the whole situation and request possible way forwards or alternate solutions for the task at hand. I have broken down my problem into the following argument.
Does the CC1310/1312 employ coherent or non-coherent detection for GFSK demodulation? If it is coherent, what are the characteristics/order of loop filter in the PLL? Is it designed to have an upper-bound on the steady state error if the incoming signal has frequency ramp? The frequency offset is increasing linearly with time. The maximum rate of this ramp is not known yet but the slope can be provided later.
To the best of my understanding, a PLL trying to lock to the phase of an incoming signal in a coherent detection may warrant a higher order loop filter.[Digital Communications, Bernard Sklar, Chaper 10 Synchronization].
If say there is no way for the existing PLL to overcome a frequency ramp in the incoming signal, can you suggest an alternate radio that may employ non-coherent detection and frequency lock may be sufficient for demodulation.
Looking forward to your valuable feedback and comments.
Best Regards
Maaz Ali Awan