CC1200 single vs. diff input impedance uncertainties

Let me add an additional note to the above question that clarifies standard differential terminology, and how that can be a problem for RF design. In low frequency differential design, "differential" input impedance Zd is specifically defined as the TOTAL differential voltage (Vid) divided by input current into ONE input (see any analog IC textbook). The drive to each input is Vid/2 and -Vid/2 (assuming perfect 180 degree out drives). So the plus input has input current +Vid/Zd and the minus input has input current -Vid/Zd (current flows out the minus as it flows in the plus, both of the same magnitude).

For an RF design with single ended drives to each input, these low frequency definitions are source of possible error in that they can lead to being 2X off in RF impedance. Assuming good signal splitting where the drives are 180 deg out of phase, the input impedance at each side has become independent of the other side via the "half circuit" concept. And, in RF the impedance really matters for good matching, so we really need to know the input impedance seen by each single ended source driving each of the plus and minus inputs.

Whether this is 60 - j60 or 30 - j30 on each effectively independent "half circuit" has a power of two effect on the values calculated for the lead-lag balun splitter network. For example, if what Texas Instruments is calling the "single ended CONFIGURATION" impedance of 30 - j30 is the same as the small signal input impedance of the transistors in the differential pair (r-pi in standard transistor modeling terminology), then this 30 - j30 impedance is what is actually seen by each side of a split RF source driving 180 out of phase (since the emitter or source of the diff pair is a small signal ground due to the balance).

So, while a check on the values presented by Texas Instruments in their CC1200 900 MHz applications circuit seems to indicate 60 -j60 to ground as the input impedance of each input, there would appear to be a chance that Texas Instruments has made a mistake in designing this apps circuit. It is possible this matching circuit needs to be re-designed to be driving 30-j30 as the impedance seen by each side.

Without schematic models of EXACTLY what is meant by the terms "differential" and "single ended", this situation is a lot more subtle and prone to error than it first appears.

Regards, Farron

Not sure if I can give you a full answer but here is how I have simulated the single ended impedance:

The port is grounded in one end.

Here is how differential impedance is simulated:

where both pins of the port is connected to the network. In both cases S(1,1) or S(2,1) is used.

TER, thanks for the detailed effort. However, I'm having trouble extracting a fundamental answer from the layout simulation graphics above. I'm asking a fundamental topology question, and it comes down to this:

1. Is Texas Instruments using the classic low frequency analog design definitions of differential impedance when specifying the input impedance (or this case, the optimum driving impedance) for the CC1200 LNA inputs?

This definition is Zin = Vid/Iin, where Vid is TOTAL plus to minum differential swing, but Iin is current flow in/out of a single input. For example, see "Analysis and Design of Analog Integrated Circuits, 4th Ed", Grey et. al., pp. 224-231.

2. If so, then it would appear that this useful low frequency definition is fundamentally out of place in determining impedance levels and matching for this RF application. That is because:

A. At UHF frequencies the board level designer is generally restricted to guiding structures like microstrip that are fundamentally single ended against ground. The board will not be running "twin line" type differential structures that are valid in free space, because ground is all around.

B. If the signal is properly split into equal magnitude 180 deg out of phase components by the balun, then via the analog "half circuit" concept with resulting virtual ground at the differential pair emitters, each input is fundamentally single ended for matching purposes. In this case, the Zin seen by the ports driving each LNA input is 30 -j30 at 900MHz. There really is no "differential configuration" from the RF board design point of view.

C. Using the differential numbers for impedance, which are high by a factor of two, results in factor of two errors in the balun circuitry values. That appears to be the case in the TI 900 MHz applications circuit for the CC1200.

By getting these fundamentals correct, the CC1200 would pick up useful extra sensitivity. Do you concur?

Thanks,
Farron

TER, I have another input here. 

If the series model of single ended 30 - j30, or 30 ohms in series with 5.9pF at 915MHz, is transformed into a parallel mode model, it by coincidence transforms to 60 ohms in parallel with 2.7pF.  That "60 ohms" has nothing to do with the "60 ohms differential" impedance in the data sheet.  It is a resulting 60 ohms in parallel with 2.7 pF single ended equivalent model, where the 2.7pF is then resonated out as part of the balun circuitry. 

That would be an approximately correct match with the circuitry shown for the balun in the 900MHz application circuit.  I thus believe that balun circuitry is fundamentally OK.  Also, it seems clear that the author of the data sheet is using the classic low frequency definition of differential impedance.

The data sheet would certainly be more clear if it both deemphasized the unused differential model in favor of the single ended model that the board designer actually uses, and gave clear definitions of both.  It would also help if the apps materials described the series to parallel model conversion process, and how the balun is designed.  Right now it is a mystery until the customer puts in quite a lot of time figuring it out. 

Regards, Farron

For a RF design doing a differential to single ended conversion is not practical. That is why I posted the two pictures. To find the impedance in the design phase the best method is to simulate the design in ADS or similar to take into account the effect of the substrate, proximity to metal and component models.

TER, the user cannot simulate a match without being provided a model of the input impedance that he is matching to.  Until he has the model, he has nothing to simulate with. That's why I am asking about the specific nature of the input impedance model. 

If it were not practical to do single ended to differential conversion, then Texas Instruments would not be providing the CC1200 with a differential input that requires such a conversion.  They show such a conversion on their 900 MHz application circuit. 

The problems here are not simulation details or lack of practicality.  They are:

1.  The data sheet is emphasizing a differential input impedance which is really secondary to the single ended impedance that the user is really matching to. This misleads the user into thinking he needs to be working with the differential impedance in the simulations.  No, the analysis and simulation on the part of the user starts with the single ended impedance.   

2.  No explanations are given in any applications materials that I have been able to find on:

A.  The general need to convert the single ended serial input impedance model to parallel to design the balun and match it.

B.  The design procedure of the balun.  It is currently shown in the 900 MHz applications circuit without explanation of any kind. 

What is needed here is an application note that spells it all out in detail.  I've put the time in now to have figured it out, but this was a little tricky to get to the bottom of from the current state of the Texas Instruments collateral.  If you want to discuss it in more detail, e-mail me at farron.dacus@yahoo.com, and I'll be glad to go into the full depth. 

Regards, Farron

Sorry, then I had misunderstood your question and I thing you have misunderstood the datasheet somewhat.

The datasheet specify the optimal source impedance. That is the impedance that should be seen into the balun and matching network (without the chip connected) For the RF_P/N pins this is a differential impedance and not sure why you want to convert this into a single ended impedance.

More information in general can be found here: processors.wiki.ti.com/.../CC26xx_Optimal_Load_Impedance

TER, that link appears to be dead, so I could not check it out. 

The specification of optimum source impedance instead of load impedance is irrelevant, since the load impedance is simply the complex conjugate of the ideal source impedance.  Thus, a 30 + j30 ideal source impedance can only mean a load impedance of 30 -j30.  The reason the user prefers to work with load impedance is because his simulator usually drives from an ideal 50 ohm impedance.  He usually prefers matching the load impedance, not the source impedance, because if the load is matched to be real then it can be driven from well controlled microstrip lines.  The user cannot just drop that complex impedance on microstrip without mismatch and phase rotation over line length, so he needs to match it to real first. 

To answer your question about why I am concerned about single ended load impedance, it is because the real board design IS single ended, and so is my s-parameter simulator.  Each of the two drive points to the LNA inputs are by themselves single ended signals operating over ground plane, with a native impedance (depending on part and trace widths and height above ground plane) in the range of about 30 to 70 ohms (you cannot escape this when operating over a ground plane at 900 MHz over distances that are not negligible compared to a wavelength).  From the matching point of view, it is a single ended circuit design problem. 

Then, when the two equal magnitude 180 degree out of phase differential signals drive a differential input impedance, the signal balance generates a virtual ground at the mid-point of the differential impedance (this actually does happen on the emitters of the input differential pair).  Thus, the load impedance seen by each of the driving sources is HALF the full differential impedance.  The user MUST know this in order to set up proper matching, but no explanation of it is provided in the data sheet or apps materials.  My suggestion would be to have a detailed app note written up on the subject (I could start one for you guys if you wanted). 

So, what the user naturally wants to work with is single ended load impedance.  At this point I am quite sure that single ended load impedance is 30 - j30 (under the condition of being correctly differentially driven to set up the virtual ground in the middle--what low frequency analog designers call a "half-circuit").  As a circuit model, that is 30 ohms in series with 5.9pF at 915MHz.   

Now, that series model is perfectly valid, but it is easier to match if transformed to a parallel equivalent.  A model of 60 ohms in parallel with 2.9pF has the same impedance over a narrow range around 915MHz.  One side of this parallel R-C is connected to ground, and the other is the model of the LNA single ended input impedance.  Try it on your s-parameter simulator and you will see the s11 looking into either model (series or parallel) is the same. 

Now, an inductance of 10.4nH in parallel with that parallel input model will resonate off the 2.9pF and leave a single ended input impedance of 60 ohms.  This is a convenient value to drive from the lead-lag balun, as the layout designer can set up matched lengths of 60 ohm microstrip from the balun outputs to the LNA inputs. 

Regards, Farron

The link should be working again, in case it doesn't I have pasted in some of the text. The information here is also relevant for all our radios.

"The CC26xx impedance change with the state of the chip (TX/ RX) and the output / input signal level. When operated in receive, the LNA gain is adjusted according to the input signal level and is thus not constant. This results in that the LNA operates with different configuration for the different gain setting. The PA impedance is further different than the receive impedance, it changes with the output power level chosen and is not linear. The term output impedance is used for linear amplifiers or amplifiers that can be approximated by a linear equivalent. Output impedance is normally used to design complex conjugate impedance matching between amplifier and load. For linear amplifiers this is sufficient to secure optimum power transfer. This method is thus not valid for the CC26xx series. CC26xx operations are heavily dependent upon filter-balun impedance up to at least the third harmonic. Matching load impedance only at fundamental frequency could easily result in high current consumption, low output power and high spurious/harmonics.

To get the optimal performance with a CC26xx design, we highly recommend customers to follow the reference designs (schematic, layout and stack-up). TI have found the recommended balun and matching circuits through simulations and load- and source-pull measurements over the full operational range. The RF circuits are designed to give best overall TX and RX performance (output power, sensitivity, current consumption, and harmonic and spurious emission). For more tips and recommendations when making a new design, we also recommend customers to take a look at the design tips found in the HW section under Desing Resources on the BLE wiki"

You write: "The specification of optimum source impedance instead of load impedance is irrelevant, since the load impedance is simply the complex conjugate of the ideal source impedance. " This is an assumption from your side. As I wrote we give the impedance the RF pins on our chips want to see. We have never measured the chip impedance because it's not relevant.

ADS is fully capable of simulate differentially.

I forgot to ask: Why are you looking into this?

Hi TER:

Sorry to have to disagree, but the statement "The specification of optimum source impedance instead of load impedance is irrelevant, since the load impedance is simply the complex conjugate of the ideal source impedance"  is not an assumption.  It is first order linear circuit network theory as taught at the EE sophomore level.  Linear network theory is applicable here for the LNA, since it is not driving into compression at the weak signal levels where good matching is needed. 

Defining optimum source impedance instead of stating load impedance is of course also theoretically valid, but in my opinion it is less intuitive.  It also suffers from the practical problem that the load must be matched to be real before going out on microstrip, so giving the load impedance is more in line with what students are taught and with what normally occurs in practice.  I would recommend that TI adopt that approach in order to not confuse customers. 

The reason I'm looking into it in such detail is that I am an RF design consultant who in 30 years in the RF design business has come to appreciate the high value of making sure I understand and apply correct fundamentals.  I've witnessed several companies I worked for get those fundamentals wrong and lose millions of dollars, and sometimes go out of business as a result.   In this specific case I am developing a high volume design for a client, where the link performance of the CC1200 alone is not adequate either as is or when supplemented with the CC1190 front-end.  The custom low noise amplifier and a one watt power amplifier that have been designed for this app results in a system link budget about 12 dB better than the raw CC1200 and 6 dB better than the CC1200+CC1190.  To get optimum performance, I can't throw away dB's in the matching from the off-chip LNA to the on-chip LNA, so I had to make sure I had that matching fundamentally correct.  The matching shown in the CC1200 apps circuit is not bad, but it is not optimum either, and it was possible to improve it.  By meticulously preserving every possible dB we now have a solid design that will meet the demanding requirements of this application.

Regards, Farron

If the Rx and Tx path are separated a complex conjugated match is in some cases valid for the LNA. But that requires that we are able to measure the differential impedance accurately into the chip. What we have done is using source pull after the balun to find the source impedance that gives the best sensitivity and on CC1200 we have measured the same sensitivity as we have calculated theoretically during the design phase which indicate that the method works. Source pull has also shown that the best sensitivity can be achieved with impedances covering a fairly large area in the smith chart.

Text books deal with a very simplified view to make it easier to understand and do hand calculations. But I haven't seen too many text books covering how to find a match for both Rx and Tx at the same time when the PA and LNA share pins, how to do trade offs between output power, harmonics, power consumption and radiated harmonics etc. In the end measurements have to be done to ensure that everything have been accounted for.

30 dBm vs 27 dBm gives you 3 dB better link budget which would indicate 3 dB better sensitivity that CC1200 + CC1190. Which NF does your LNA have to achieve this?

TER:

I should allow for one additional possibility in the above.   The "optimum" source impedance for the CC1200 Rx inputs might not be optimum power match (lowest reflection) but instead the match for minimum noise figure.  The data sheet does not say, and since the noise figure is relatively high (again not given in the data sheet, but seems to be 7-8 dB based on sensitivity), I have been assuming it is more likely a power match.  But, if it is a noise match, that at least explains the focus on optimum source impedance instead of simply giving the input impedances. 

The confusion here has multiple sources, as follows:

1.  Lack of definition of differential impedance and differential and single ended "configuration".  These terms are used in the data sheet without clear definition, without discussion, and without illustrating figures. 

2.  General use of single ended circuitry in RF, even in the case of differential inputs, as microstrip is inherently single ended.  This needs to be dealt with in advising the customer.

3.  Optimum source impedance given without defining "optimum" (power or noise match). 

4.  Emphasis on simulation as an answer,  instead of fundamental definitions and parameters as answers.  Simulation discussions without prior definition tend to simply add confusion.

However, I do appreciate the effort made in trying to shed more light on the situation. 

Regards, Farron

 

TER, there is a good reason to be concerned with transmission/microstrip line effects here. The CC1200 differential input needs a balun with each input driving by a balun output that are intended to be exactly 180 degrees out of phase. At 915MHz the phase shift in FR-4 board is about 2.3 degrees/mm. Trying to control this phase match is also a good reason to be concerned with load impedance, and not go with just optimum source impedance.

Best, Farron

As I have written, the chip should see a given impedance into the differential network. Whatever phase shift the routing introduce is included in this number. In other words, the user has to design a network that with the component values + routing has the given impedance.