CC1310: Programming issues in custom made board

Since you get wrong Dcoupl and VDDR values you most likely have a fundamental hardware issue.It's not possible to see what you have done wrong in the hardware based on the information given in your post. 

What information is needed to figure out what could have gone wrong ?

Minimum the schematic (pdf) and layout (gerber). First start by measuring the impedances for all pins to ground and look for shorts. Compare with launchpad if you have one.

My board is 2 layer design and I have CC1310 LaunchXL - 4layer board. Comparison of impedances shows values halved at many points. Is it due to the difference in layers? 

2-layer vs 4-layer should not show any differences with regards to DC impedance. 

1. How can we say if the chip cc1310 is good or not?

The board is not getting detected by the Smart RF Flash Programmer. What could be the reason?

As said, you need to debug your hardware. If Vdcpl/ VDDR are not as expected you have a hardware issue. Finding a hardware issue is not possible remote but I can check if you have done fundamental errors on the schematic/ layout. 

- Have you checked the VDDR and VDDS Voltage?

- Have you followed the Reference Design?

- Also Verify your board by sending your Schematic and Gerber file to TER by private message OR on the forum. It's always better to cross-check the design with TI Team's(TER) before you go to the Manufacturing.

The layout of a 2 Layer CC1310 Board! 

1. Yes VDDR = 2.2 V and VDDS = 3.3 V.

2. Yes followed the 2 layers CC1310 board design.

3. No. Didn't get the design verified. I will get it done now. even though I have gotten the board printed. 

1. which is not right(VDDR).Is your 3.3V constant?

2. No I don't think you have followed the Reference Design. As I can see RF section and decoupling Caps (of VDDS_DCDC,VDDR  has to be placed very close to the CC1310) has not done according Design guidelines.

* RF_N and RF_P has to be differential pair(i.e. you need match the length) and Have you used the same filtering circuit for the Balun and PI Matching filter.

* I do not understand why have you placed Decaps away from the CC1310 pin and also the crystal.

Have you considered this before design :

http://www.ti.com/lit/an/swra640a/swra640a.pdf

Let TER give his verdict.

As I wrote,Minimum the schematic (pdf) and layout (gerber) is a minimum. The plot you posted does not show a ground layer, does that mean that the plot is not showing everything? 

What do you mean by minimum the schematic (pdf) and layout (gerber) is a minimum? 

There is a ground plane 

1. Yes. VDDR is not right. 3.3V is a constant from LDO. 

2. The components were placed for the ease of soldering as done in the lab. 

Does that have a lot of effect on the circuit?

How can that be resolved?

I don't think I have followed the design from the document. 

Meaning that I would need the schematic in pdf format and the layout as gerber files to do a review.

Does "he components were placed for the ease of soldering as done in the lab. " mean you have soldered all the components for hand?

Why can't you just send the Schematic(as PDF) and Gerber File to TER? 

Yes, except for the CC1310 chip, rest of the components are soldered in the lab. 

Hi, 

So, I don't know how and for how long - the VDDR and DCOUPL pins are showing expected voltage levels for my board and I am able to program the board using RF Programmer, but I am not receiving any output on the terminal. I am using TeraTerm to view the output. 

I suspect poor soldering