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CC3200: CC3200 SPI Master DMA Data acquisition

Part Number: CC3200

Hi Team,

The FPGA as the slave and the CC3200 as the master device interact with the FPGA through SPI Master mode;

There are a few questions,

  1. SPI As a Master, calling DMA, under what circumstances can SPI be triggered to read and write? How to set the trigger conditions;
  2. If the FPGA side data acquisition is full, how to notify the SPI DMA to obtain the handling data?
  3.  What is the trigger condition for SPI as Master SPI_INT_DMARX/TX?
  4. What are the conditions for this trigger of the SPI as a Master SPI_INT_EOW?
  5. For FPGAs, if the data acquisition is full, whether cc3200 can be informed by GPIO, and then SPI DMA RX data transceiver and sent and received by interrupt nesting; So how does the corresponding TX trigger?

Best Regards,

Susan Ren

  • As a master the application is sending SPI transaction requests to trigger read and write.

    There is no flow control, the slave should free the RX buffer in time (slower clock can be configured if needed).

    Information on the available interrupts and the behavior in general can be found in the Technical Reference Manual (https://www.ti.com/lit/pdf/swru367).