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CC2520: Questions about CC2520

Part Number: CC2520


Hi,

I am working on the CC2520. I have two questions regarding on the datasheet and the example codes. Hope I can get some help here.

1. In this FSM figure, what does "all state" mean? Does it include all states, like "idle"? So if I call STXON when it is at "idle" state, is it going to convert to "TX calibration" state? Same question for "any RX state", so no matter it is in "SFD wait" or RX calibration", as long as I call STXONCCA and cca=1, it will goto "TX calibration", right?

2.  I know that PAN_ID, ADDRESSES are stored by Little-endian in the RAM, therefore, before writing to TXFIFO, we need to convert them to Network Byte Order. 

However, In basic_rf.c file, I don't understand why writing the FCF in Little-endian. For example, if the FCF part is 0x8861, it takes lower 8 bits first to write into the array, which makes the FCF in the TXFIFO to be 0x6188. Are they supposed to be transmitted in this order? Or I messed up somewhere? 

Thanks,

Charles

  • I am using two device, and both of them have the CC2520 connected via SPI. I just want to send a frame from the transmitter to the receiver through radio. Here is the situation where I got stuck. The transmitter repeats to send the frame and has everything sent out, but the receiver cannot receive anything in RXBUF. I haven't used any interrupts yet. I have double checked the communication channel for transmitter and receiver are identical. I have never caught a high status on TX_active on the transmitter, I think it is because the clock frequency (32 MHZ) is much higher than SPI, and the time for TX_ACTIVE is really short. 

    The Register status on the transmitter: 

    EXCFLAG0 : 3  (TX_FRM_DONE, RF_IDLE, are high)

    EXCFLAG1: 32 (SFD EXCEPTION is high)

    If RXENABLE on FRMCTRL1 is low, FSMSTAT0 gives 0 (IDLE). After RXENABLE is set to high on FRMCTRL1 in transmitter state, 

    FSMSTAT0 : 6 (FSM_FFCTRL_STATE: 110, SFD wait)

    FSMSTAT1:  29 (CCA,SAMPLE_CCA, LOCK_STATUS, RX_ACTIVE are high), not sure why lock_status is high here. ('1' when PLL is in lock, otherwise '0'.)

    TXFIFONT: 22 (Correct, I wrote 22 bytes into TXFIFO)

    TXPOWER: 147 (Seems right)  

    The frame I print out from TXBUF is: 0X17 (frame length) + 0X61 0X88 (FCF) + 0 (sequence number) + 0X07 0X20 (PANID) + 0XFF 0XFF (Destination address) + 0X20 0X25 (Source Address) + .....(payload)

    The Register status on the receiver: 

    EXCFLAG0 : 32  (RX_UNDERFLOW high)

    EXCFLAG1:  0

    EXCFLAG2:   16 (RF_NO_LOCK high)

    FSMSTAT0 : 6 (FSM_FFCTRL_STATE: 110, SFD wait)

    FSMSTAT1:  21 (CCA, LOCK_STATUS, RX_ACTIVE are high)

    I have disabled the FRMFILT0.FRM_FILTER_EN on receiver side so that it can receive all types of the frames. The SFD is supposed to be generated automatically, but it seems that it doesn't see the SFD on receiver side.

    Any suggestions for debugging will be helpful. Thanks.

  • Hi,

    I will look into this and get back as soon as possible.

    Thanks for your patience.

    Regards

  • Hi FI,

    I think I have got it working now. It is because of TXPOWER issue. Someone else wrote the codes, and whenever he wrote value into the registers or memory, he wrote extra data.Therefore, some registers and memory, like TXPOWER, are overwritten by this action. 

    Hope you haven't spent too much time on it. Sorry about it.

    I only have question on the order of FCF now (2nd question of my initial post). In the example code, why does it load the lower 8 bits first?

  • Hi,

    I think this is the way the device works. Is this causing any issue in your implementation?

    Thanks,

  • Not really. Just curious about it. It doesn't mention that in the datasheet, so might cause the errors when writing the codes without looking at the details on the samples.

  • Hi,

    I am going to close this thread for now. You can reopen this if you see any errors occurring in your implementation.

    Regards