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TAS5754M Protection

masaki matsuoka1
Prodigy 100 points
Other Parts Discussed in Thread: TAS5754M

Hi Ti Engineers.

I have a question about DC protection of data sheet .

D/S(8.3.6.3 DC Offset) says “If the TAS5754M device measures a DC offset in the output voltage…”

Concretely, How many volts is detection offset voltage?

I'd like to test to work at the values you designed.

Can I test  that?

Best, Regards

M.Matsuoka

  • 0
    TI__Mastermind 34705 points

    Hi Matsuoka-san,

    This DC protection is in the power stage. The threshold is ~ 2.6V at the output.

    for example, if it shuts down around 59% and 37% duty cycle on A+ and A-. A difference of 22% duty cycle @ 12V PVDD. DCE threshold = 12V(59-37)/100 = 2.64V. To measure this to will have to bypass the DC blocking cap between the DAC and the Class D then drive an analog DC input voltage into the class D SPK_IN+ of (Vin-Vcm). Depending on the SPK_GAIN/FREQ the class D gain is 20 or 14dB.

  • 0 in reply to Damian Lewis
    Prodigy 100 points

    Hi Damian san
    Thanks for your reply.

    It depends on PVDD, doesn't it?

    Do you have any ideas to detect it by 2~3V with 24V PVDD.

    Regards.
    M.Matsuoka

  • 0 in reply to masaki matsuoka1
    TI__Mastermind 34705 points

    Hi Matsuoka-san,

    It's not PVDD dependent. The threshold should be ~2.6V at 24V PVDD.

  • 0 in reply to Damian Lewis
    Prodigy 10 points
    Hi Damian san

    In my case,shuts down voltage is 5.28V at 24V.
    5.28＝24 * (59 - 37) / 100 as you mentioned.

    Do you have any solution when I would like to down the voltage?
    for example,I want to change from 5.28V to around 3V at 24V.
    because if TAS5754M has an accident by DC offset, speaker may have receive serious damage .
    In the worst case, there is a possibility that burns out the SPK voice coil.

    Best regards,
    Masaki.Matsuoka