TAS5754M: How to use the 3-wire function of TAS5754M

Hi Andy
thanks for your suggestion , we will try it and feedback later.

Hi Andy
We have try your code, we find this use the clock automatic configuration function, and this can work.
but on our board, the BCK\LRCK is 1.411M\44.1K, So in automatic mode , it can't work. So we need to configure the frequency divider, that is bit1=1 of P0-R37, we have the problem to configure the frequency divider parameters？ pls. give some help. Thanks a lots.

Hi Aggil,

Let me double check your clock settings and send another script which is to manually configure PLL settings.

Andy

Hi Aggil,

Try the script below, which configures the PLL to support your preferred 3-wire i2s input.

#3-Wire I2S
#System Clock PLL Mode with NO MCLK input. Provide supply voltages(3.3V). Don't provide I2S clocks yet.
#Write 0x00 at address 0x00 (Go to Page 0)
w 98 00 00
#Write 0x10 at address 0x02 (Standby request)
w 98 02 10
#Write 0x0A at address 0x25 (Ignore SCK halt detection, Disable clock auto set)
w 98 25 0A
#Write 0x10 at address 0x0D (PLL clock source => BCLK)
w 98 0D 10
#Write 0x00 at address 0x14 (PLL divider : PLL P = 1)
w 98 14 00
#Write 0x20 (BCLK=32fs) at address 0x15 (PLL divider : PLL J = 32)
w 98 15 20
#Write 0x00 at address 0x16 (PLL divider : PLL D(MSB) = 0)
w 98 16 00
#Write 0x00 at address 0x17 (PLL divider : PLL D(LSB) = 0)
w 98 17 00
#Write 0x01 at address 0x18 (PLL divider : PLL R = 2)
w 98 18 01
#Write 0x01 at address 0x1B (DSP Clock divider = 2)
w 98 1B 01
#Write 0x0F at address 0x1C (DAC Clock divider = 16)
w 98 1C 0F
#Write 0x03 at address 0x1D (NCP Clock divider = 4)
w 98 1D 03
#Write 0x07 at address 0x1E (OSR Clock divider = 8)
w 98 1E 07
#Write 0x00 at address 0x22 (Interpolation filter = 8x, fs setting= 48kHz)
w 98 22 00
#Write 0x04 at address 0x23 (IDAC(MSB), IDAC = 1024 cycles)
w 98 23 04
#Write 0x00 at address 0x24 (IDAC(LSB), IDAC = 1024 cycles)
w 98 24 00
#Write 0x00 at address 0x02 (Standby release)
w 98 02 00
#Provide I2S clocks (MCLK : floating, LRCLK : 44.1kHz, BCLK : 32*fs = 1.414MHz)

Andy

Hi Andy
thanks, we will try again.