Hello Team,
I would like to ask the following question.
What is the cause of this Start-up delay with Vin?
I guess this delay time is caused to lift logic circuite after lifting UVLO.
Best Regards,
Hidetoshi Matsunami
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Hello Team,
I would like to ask the following question.
What is the cause of this Start-up delay with Vin?
I guess this delay time is caused to lift logic circuite after lifting UVLO.
Best Regards,
Hidetoshi Matsunami
Hidetoshi,
What are your UVLO resistors set at?
Enable threshold voltage No voltage hysteresis, rising and falling, 25°C 1.15 1.25 1.36 V, but at what Vin will correspond to this value based on the UVLO resistors?
Hello Alex,
Thank you for your response.
Sorry for the late reply.
UVLO is set at 2.5V and Vin is 8V.
Best Regards,
Hidetoshi Matsunami
Hello,
I'm looking forward to hearing from you.
Best Regards,
Hidetoshi Matsunami
Sorry for the delay response, I was out of office. The delay is caused because Vin needs to be greater than Vout so that the Boot capacitor will charge and be able to turn on the high side FET. This is only a buck converter and cannot operate in the region where Vout>Vin and therefore wont turn on.