Good evening.
When I turn on device power, I execute power-on reset under the instruction (8.3.20) and set given signals on TLK:
enable <= 1
lckrefn <= '1'; —
tklsb <= '0';
tkmsb <='0';
testen <='0';
prbseen <='0';
pre <='0';
loopen <='1';
GCLK=80 MHz
I set orthogonal pulse with frequency 40 MHz on each bus-line TXD[0-15].
Not all signals correspond to TXD[0-15] on RXD[0-15]. Some of bus-lines set in '1' or '0' while others produce orthogonal pulses with frequency 40 MHz. When I turn off and turn on device power, lines which have the transmission error change.
1. What is the possible reason for that?
2. Do we have the possibility to reload circuit board in the process of working
