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TLV320AIC23B: SIP with non supporting microprocessor (TMS320DM368ZCED)

alessandro piscozzo
Prodigy 90 points

Part Number: TLV320AIC23B

Hi,

we have a board developed few years ago with the two following cips:

TMS320DM368ZCED (microcontroller NRND, but we still support the platform)

tlv320aic23b (audio codec)

We'd like to implement a SIP feeding back the signal from the microphone acquired with the codec, to the microprocessor through the I2S bus.

The microcontroller doesn't have any SIP stack implemented. Would it still be possible to do it anyway?

Has anyone done that already?

Thanks and regards,

Alessandro

  • 0
    TI__Expert 6995 points

    The TMS320DM368 has a McBSP serial port that can be configured for I2S communication to exchange data with the TLV320AIC23. This app note meant for C6x MCBSP is a good example on how to set up this peripheral for I2S communication.

    The TMS320DM368 has Linux implemented in the DVSDK. You can also find more information on software development in the DaVinci wiki pages and the DVSDK wiki pages. The DVSDK supports I2S communication with the McBSP.

    Best regards,
    Pedro

  • 0 in reply to PedroGelabert
    Prodigy 90 points

    Hi Pedro,

    thanks for your answer.

    I looked at the app note that you linked and I've checked my CPU-CODEC connection against what I found in the app note.

    Question: 

    looking at the attachment, do you think that we should be able to convey to the microprocessor through the I2S the microphone signal?
    (the arrows in the pictures are "forced directions" meaning that there are uni-directional buffers which set the direction of each signal)

    Thanks and regards,

    Alessandro

    connection diagram.pdf

  • 0 in reply to alessandro piscozzo
    TI__Expert 6995 points

    Alessandro,

    Your diagram is correct for slave mode operation.

    There are basically two modes of operation for the AIC23: slave or master.

    • In master mode,  the AIC23 generates the frame sync and sends the data to the microprocessor.
    • In slave mode, the AIC23 receives the frame synch from the microprocessors and sends the data when requested

    Deciding when to use slave or master is really dependent on the clocks. If the AIC23 is running from its own clock, I would recommend to set it up in master mode. In this way, the microprocessor receives the data when the AIC23 generates with a consistent clock. In slave mode, differences between the AIC23 and DM365 clocks will slightly change the rate of conversions on some samples. Every now and then a converted sample will be resynchronized to the microprocessor clock, delaying it a little, so it is not at the same consistent rate. If the AIC23 is running form the same clock as DM365, then use slave mode since there is no clock difference between devices. From best audio quality, I recommend to have the AIC23 as the master of the clock.

    For AIC23 master mode, then:

    • McBSP_CLKR & McBSP_CLKX <- BLCK
    • McBSP_DX -> DIN
    • McBSP_DR <- DOUT
    • McBSP_FSR <- LRCOUT
    • MCBSP_FSX <- LRCIN

     Best regards,

      Pedro