Hello,
In our board (Am335x) we selected to work with TLV320DAC3100. We took ICS Android.
First of all we noticed that there is no codec supplied with Ti Android.
We written our own codec implementation, but we cant make it work. We take MCLK from external PLL and drive both BCLK and WCLK. With scope we see that BLCK outputs 44.1 KHz clock, that seems fine but we don't see WCLK / Data on MCASP interface.
Maybe you'll give us some hints where to look for the problem. Bellow is the registers dump for our codec configuration:
Thanks
Page 0 Regs from 0 to 95
REG# VALUE
-----------------
0 0x0
1 0x0
2 0x1
3 0x66
4 0x3
5 0x91
6 0x7
7 0x2
8 0x30
9 0x0
10 0x0
11 0x85
12 0x83
13 0x0
14 0x80
15 0x80
16 0x8
17 0x0
18 0x3c
19 0x0
20 0x4
21 0x80
22 0x4
23 0x0
24 0x0
25 0x0
26 0x1
27 0xc
28 0x0
29 0x5
30 0x80
31 0x0
32 0x0
33 0x0
34 0x0
35 0x0
36 0x80
37 0x0
38 0x0
39 0x0
40 0x0
41 0x0
42 0x0
43 0x0
44 0x0
45 0x0
46 0x10
47 0x0
48 0xc0
49 0x0
50 0x0
51 0x2
52 0x32
53 0x12
54 0x3
55 0x2
56 0x2
57 0x11
58 0x10
59 0x0
60 0x2
61 0x4
62 0x0
63 0x14
64 0x0
65 0x0
66 0x0
67 0xe7
68 0x6f
69 0x38
70 0x0
71 0x0
72 0x0
73 0x0
74 0x0
75 0xee
76 0x10
77 0xd8
78 0x7e
79 0xe3
80 0x0
81 0x0
82 0x80
83 0x0
84 0x0
85 0x0
86 0x0
87 0x0
88 0x7f
89 0x0
90 0x0
91 0x0
92 0x0
93 0x0
94 0x0
### Page 1 Regs from 30 to 52
REG# VALUE
-----------------
30 0x3
31 0x4
32 0x6
33 0xaf
34 0x70
35 0x0
36 0x7f
37 0x7f
38 0x7f
39 0x7f
40 0x2
41 0x2
42 0x0
43 0x0
44 0x6
45 0x86
46 0x0
47 0x80
48 0x0
49 0x0
50 0x0
51 0x0
