TLV320AIC3204 Maximum PLL input clock frequency

Bernhard Boehmer

Other Parts Discussed in Thread: TLV320AIC3204

Pg. 7 of slos602c (TLV320AIC3204 Ultra Low Power Stereo Audio Codec datasheet) specifies a maximum of 20MHz for the "PLL Input Frequency" of the TLV320AIC3204.

Please clarify whether "PLL Input Frequency" refers to

a) PLL_CLKIN (as in Figure 2-51 on pg. 74 of slaa557), or

b) PLL_CLKIN / P (as equations 19 and 20 on pg. 77 of slaa557 seem to suggest)

Would an MCLK frequency of 25MHz therefore be useable as PLL input if P is greater than 1?

over 9 years ago

0 Bernhard Boehmer over 9 years ago

Expert 1050 points

Hello TI, is an MCLK frequency of 25MHz allowable as input to the TLV320AIC32x4's PLL if the PLL's P parameter is greater than 1?

0 J- over 9 years ago

TI__Mastermind 46195 points

Hi Bernhard,

PLL Input Frequency is PLL_CLKIN / P. So a 25MHz MCLK input is possible as long as equations 19 and 20 are satisfied.

Regards,
J-

0 Bernhard Boehmer over 9 years ago in reply to J-

Expert 1050 points

Hello J, thank you for the confirmation. Would it be possible to have the note under equation 18 corrected? As I understand it, the valid range of J should be [4 to 63], not [1 to 63] as indicated.

0 J- over 9 years ago in reply to Bernhard Boehmer

TI__Mastermind 46195 points

Hi Bernhard,

Thanks for catching this. I will add it to the list of fixes for the next revision.

Thanks,
J-

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TLV320AIC3204 Maximum PLL input clock frequency