Dear all,
we're currently trying to set up a TLV320DAC3120. I found this thread which gives a good idea on how to initialize the IC. Alas, we did not connect the MCLK as we assume(d) that you can use the PLL together with BCLK, WCLK or GPIO1 in order to generate the necessary clocks within the DAC.
Therefore, we adjusted the examples from the thread above to use the GPIO1 as an input to the PLL:
// PLL ON. GPIO1 20 MHz, PLL_CLK = 9.6 MHz, Fs = 96000 Hz // P 5, R 2, J 6, NDAC 2, MDAC 5, DOSR 50. dac_writePageAddress(0, 4, 0x0B); // 0x8 (PLL_CKLIN = GPIO1) + 0x3 (CODEC_CLKIN = PLL_CLK) dac_writePageAddress(0, 5, 0xD2); // 0x80 (PLL on) + 0x50 (PLL divider P = 5) + 0x02 (PLL multiplier R = 2) dac_writePageAddress(0, 6, 0x06); // 0x6 (J-VAL 6) dac_writePageAddress(0, 7, 0x00); // 0 (D-VAL MSB) dac_writePageAddress(0, 8, 0x00); // 0 (D-VAL LSB) // NDAC = 2, MDAC = 8, dividers powered on dac_writePageAddress(0, 11, 0x82); // 0x80 (DAC NDAC divider on) + 0x02 (DAC NDAC divider = 2) dac_writePageAddress(0, 12, 0x85); // 0x80 (DAC MDAC divider on) + 0x01 (DAC MDAC divider = 5) // DOSR = 128 dac_writePageAddress(0, 13, 0); // 0 (DOSR MSB) dac_writePageAddress(0, 14, 50); // 50 (DOSR LSB)
Sadly, when we try to play said beep (with adjusted registers for the frequency of course), the speaker just remains silent.
So, question 1: Is it possible to use GPIO1 instead of MCLK and to keep the latter one floating?
And question 2: Is there any way to test whether the PLL runs at all?
We tried
dac_writePageAddress(0, 27, 0x08); // output BCLK dac_writePageAddress(0, 30, 0x80 + 100); // Divide BCLK by 100 dac_writePageAddress(0, 29, 0x01); // Output DAC_MOD_CLK on BCLK
which leads to the rather unexpected result that the connected speaker plays some scratchy noise while we can see that the clock on GPIO1 no longer works (as if the IC pulls it down). At least, we get some clock-like signal on BCLK with 35 to 40 kHz (instead of the expected 48 kHz).
Thanks,
Sebastian
