We have a customer with the following questions related to the datasheet of the analog front end Texas Instruments AFE5851. Can you please answer?
1. The absolute maximum ratings table (page 4) specify 2.2 volts maximum for “Digital control pins to DVSS” but the digital characteristics table (page 6) specify 3.6 volts maximum for “Digital Inputs – High-level input voltage”. Moreover, the serial interface section (page 17) say “SEN_B has a 100K ohms pull-up resistor to DVDD18”. Is the digital input signals are 1.8 volts or 3.3 volts logic level?
2. Is the LVDS data outputs are MSB first or LSB first?
3. In the general purpose register map (page 18) in function SERIALIZED_DATA_RATE the serialization factor 10X is define but the description of that function on page 23 say “it is not possible to select a 10 bit stream with a 12 bit ADC”. Is the 10X serialization factor available?
4. In the general purpose register map (page 19) the number in function OFFSET_CH9 doesn’t match the number in the description “Value to be subtracted from channel 10”. There is the same inconsistency for OFFSET_CH10, OFFSET_CH11, OFFSET_CH12, OFFSET_CH13, OFFSET_CH14, OFFSET_CH15 et OFFSET_CH16. Is OFFSET_CH9 related to channel 10 or to channel 9? Is it the same answer for OFFSET_CH10 to OFFSET_CH16?
5. Is the register offset subtraction applied after the test pattern? In other words, can I choose a test pattern and applied the register offset subtraction to that test pattern?
6. Is the TGC will work properly if the gain curve is at STOP_GAIN when the SYNC pulse occur? In other words, is the gain curve need to be back to START_GAIN before the SYNC pulse occur?
