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Signal Integrity Simulation for DAC3xJ84 using IBIS

Other Parts Discussed in Thread: DAC37J82

Hi there,

I'm trying to understand how the termination works in this DAC in order to do signal integrity simulation for the digtial inputs of the DACDAC3xJ84 using the provided IBIS files.

Basically I'm interested in verifying that the transmission line + vias feeding the digital inputs are okay and the line is well terminated. From what I understand I can use IBIS to get the termination characteristics for the driver in the receiver. However, I'm not sure how the common mode termination from the 50 pF capactor is accounted for or whether it needs to be accounted for.


The broader question is I'm new at doing this sort of SI work let me know if I'm completly going down the wrong path on this one.

-Stephen