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question about ADS8881 reference design

Mike Wang2
Intellectual 2760 points
Other Parts Discussed in Thread: REF5045, THS4281, OPA333

Hi all,

I'm now testing the ADS8881EVM board due to the reference design and datasheet. And I have several questions as below:

1. As the input anti-aliasing filter design, make the Cfilter >20 Csample (page 8 of the ref design), it said it's a rule of thumb. and I wonder how does this rule derive?

2. Similar question with 1, Rfilter should be 20 times smaller than Rswitch (page 9 of ref design), how does this derive?

3. The ref design is to achieve a SNR of 98dB. However, my result is only 96dB. I found that, when calculating the system noise, the ref design doesn't count the noise of buffer at reference driver. I found it might be large without a filter at output. when removed it, test result of SNR increase to 97dB . So I wonder whether I should use a buffer at ref. I know it can offer larger current output for ADC ref, but it also increase noise. Could you tell me how can I balance these two effect? Or how can I calculate between these two situation before test. For this case, just a REF5045 with a low pass RC filter (large capacitor) is better.

  • 0
    TI__Expert 5705 points

    Hi Mike,

    1) As the document explains, the filter cap value is determined by constraining the voltage droop across the capacitor after charge transfer be <= 5% of its initial value. This is a conservative rule of thumb that ensures that the driving op amp does not go into slew. Op amp slew causes the input-output relationship of the op amp to become non-linear and leads to significantly longer settling times that are also more difficult to predict.

    2) Rfilter forms a voltage divider with Rswitch, and Rswitch (for an analog switch) varies (in a non-linear fashion) with input voltage. As a result the divider ratio also varies with input voltage, and the ADC sees a distorted signal. By making Rfilter << Rswitch, the divider ratio, Rswitch/(Rswitch + Rfilter) becomes almost constant (~= 1) for any values of Rswitch and Rfilter, and the linearity of the input signal path improves. Rfilter = Rswitch/20 is a good rule of thumb.

    3) Using a cleaner input signal source will get you better SNR. 98dB SNR for a +/-4.5V full scale signal translates to about 40uV of RMS noise referred to the ADC input. So you need to ensure that your input source produces significantly less than 40uVRMS noise for this design, so that its contribution does not dominate. Since the ADC input in this case is a pure sine wave, we invariably use a bandpass filter at the output of the source to obtain a low-noise input signal.

    The reference design does take into account the noise contribution of the ADC reference signal path, which is constrained to be less than 1/3 of the total ADC input referred noise (see section 2.5) so that its contribution to the total system noise becomes insignificant. A buffer is absolutely required for regulating switching load currents that occur at the reference input while the ADC is converting. Otherwise, ADC linearity degrades severely. Noise reduction and high bandwidth for load regulation are contradictory requirements, so the only way to achieve both is to use a high bandwidth amplifier that has low noise density over a wide frequency band. Note that the noise contribution of the reference driver in this case is dominated by the contribution of the THS4281; the OPA333 and REF5045 outputs are heavily low-pass filtered. With a noise density of 12.5nV/rt_Hz, the contribution of the THS4281 over a closed loop bandwidth of about 1MHz would come out to about 12.5uVRMS which is approximately 1/3 x 40uVRMS (ADC input referred noise). Actual results may be different but the point is that the reference driver contribution will not dominate.

    I hope this helps.

    Regards,
    Harsha

  • 0 in reply to Harsha Munikoti
    TI__Intellectual 2760 points

    Hi Harsha,

    Thank you for your reply. 

    For the ref noise part, you said "A buffer is absolutely required for regulating switching load currents that occur at the reference input while the ADC is converting. Otherwise, ADC linearity degrades severely. " But I wonder if regulating switching load could be achieved by a large capacitor at ref pin? I think a large capacitor can also provide current for regulating the switching load (I use 100uF for test, SNR is better than using a driver).

     

    Best Regards,

    Mike Wang

  • 0 in reply to Mike Wang2
    TI__Expert 5705 points

    Hi Mike,

    You are correct, however, if you are converting continuously then the voltage across the cap decreases over multiple conversion cycles. Using a buffer guarantees low impedance drive (because of its high bandwidth) to quickly replenish the charge on the bypass cap.

    Regards,
    Harsha