Hi,
We are having some trouble with ADS8363. We selected OP4177 because low drift is important in this application.
The input signal is a <1 kHz sinusoidal pattern. With a 5 MHz clock in half clock mode, the CONVST signal triggers @ 240 kHz. This 240 kHz seems to feed back into the OP4177 circuit, which amplifies it and the ADC produces this noise envelop in the digital output.
We tried boosting the decoupling caps, changed the feedback damping and gain components, inserted a series 400R resistor. Minor differences: the noise moves around but it does not reduce significantly.
The only improvement seems to come from a snubber circuit: 20R + 100n before the ADC input. This reduces the noise tremendously, but we could not eliminate it completely.
Do you have any suggestions about opamp selection and configuration for driving this ADC? Thanks.
Rgds,
Deejay
