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ADS1220: Use system monitor MUX option to measure single-ended signal

Kevin Hughes
Intellectual 300 points
Other Parts Discussed in Thread: ADS1220

Hello,

I am using the ADS1220 to measure two different signals in a system with Vref=AVDD=2.7V.  Both signals are ratiometric.

One is a truly differential signal centered at AVDD/2, which is read 250 times per second (and has an internally set sampling rate of 1000sps to enable this)

The other signal is an NTC thermistor with resistor divider, so the Vout can span from 0.07*AVDD to 0.9*AVDD.  Once per second, I switch from the former to the latter, take a single shot measurement, and switch back.  There is a delay/gap in the first measurement due to this switch, but so far that has not been a problem since we only read the first signal every 4ms.  So, I have two questions:

Due to the single-ended thermistor violating common mode voltage limits, I have to consider the following:

1. Is there any switching or settling time associated with disabling and enabling the PGA?  What about changing gain?

2. Can I set AINN to be a system monitor voltage, i.e., AINN = AVDD/2 and AINP=Vout of thermistor?  Other threads I've read on this forum list single-ended signals as referenced to AVSS, but is there any issue with measuring it pseudo-differentially against an internally-derived system voltage?

Thank you for any advice and input you can offer,

Kevin

  • 0
    TI__Guru** 113765 points

    Hi Kevin,

    Let me answer your second question first.  The mentions made in other posts referring to single-ended measurements with respect to AVSS is that AVSS is the only MUX option available for internal connections.  There is an option for internally connecting both the inputs to (AVDD-AVSS)/2, but this connection shorts the inputs together for measuring noise and offset.  There is no way to just set the AINN input to mid-supply internally.  If you want to make a pseudo-differential measurement you can do so externally.  This is discussed on page 23 of the datasheet and shown as an example in Figure 45.

    The settling time question becomes a little more complicated.  There is always the potential of creating an overload condition or settling issue with input filtering.  This may be relative to charge flow through a largely resistive pathway and cause analog settling relative to capacitance in the filter.  The switches for changing mux connections are break before make, so internal to the ADS1220 you should see little issue.  However, by changing the pathway from PGA enabled to PGA disabled does amount to a small variation in current which may take time for the input to settle depending on the input source, filtering and voltage applied.  In the datasheet review figures 15 through 26 beginning on page 11.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Intellectual 300 points

    Hi Bob,

    Thank you for the helpful reply.

    Regarding pseudo-differential measurements, I see that I will have to consider a hardware change in future to enable comparison to a non-AVSS voltage (we actually built the PCB with one of the inputs connected to GND, thus making the mistake of violating common mode voltage for that measurement.)

    Now, regarding switching from PGA to non-PGA measurements, could you describe how the typical absolute and differential current graphs you refer to can be used to determine settling time?  Is the issue the sudden application of ~10nA current draw to a given MUX input?  That is, when the MUX is set away from, e.g., AIN0, no current leakage occurs at that node, but when the MUX is set to AIN0, now there is a ~10nA draw, which may then have some effect depending on filtering?

    Thanks again,

    Kevin

  • 0 in reply to Kevin Hughes
    TI__Guru** 113765 points

    Hi Kevin,

    This becomes somewhat confusing as I don't know your schematic and it becomes very difficult to predict even if I do know your values.  In reality you may not see any issue at all as any potential difference may be within the level of noise.  Also, you need to consider that the currents shown are mostly due to device leakage prior to the true ADC input.  The differential current actually changes very little from PGA enabled to PGA disabled.  So there really should be very little difference when switching measurements and that is why I mention that the change may be within the level of noise at 1000sps which will be around 260uV p2p. 

    Analog settling will be dependent on the input RC time constant to settle within 1 LSB (+/- 1/2 LSB) of your measurable resolution for a step change.  If your measurable resolution is 14 bit, then the number of time constants is equal to -ln(1/total bits) or -ln(1/2^14) which is about 10 time constants.  Remember this is for a step change like from going negative full-scale to positive full-scale at the input filter cap.

    You really can't look at this view of settling to get a good picture of what is happening because we do not know what the residual charge is on any device capacitance at any particular point in time.  All we know is that it is possible for charge to move from the ADC to the analog inputs (or vice versa).  If the filter capacitance is very large as compared to the device capacitance, then the transfer of charge should have little impact.  So what do I mean by very large?  If the filter capacitance is 100pF or larger.

    Let's say we have one measurement that is near mid-supply and the next measurement is near full-scale.  Based on the differential input current graphs we may see a nA or two of current as the input is sampling (unless running at high temps).  Immediate charge will move from the filter cap (being a charge reservoir) to the ADC input.  Any error will be relative to the time it takes to replenish the bulk cap.

    In the case of the thermistor, there is also a current divider at the point of the thermistor and ADC input filter and the excitation pathway becomes a part of the filter as well and will affect the ability of the filter capacitor to become fully charged.  There are a number of factors to consider and this is not necessarily an easy answer.  So my question to you is, are you seeing an issue?

    Best regards,

    Bob B