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ADS7952 serial interface / SPI

PaulRoßmann
Prodigy 110 points
Other Parts Discussed in Thread: ADS7952

Hello Everybody,

i'm trying to get the serial interface of the ADS7952 to work with the SPI of a AT91SAM9 (ARM 9), but the ADS7952 is behaving very unexpectedly.

I'm sending the following data words:

while(1)
{
      0x4200                // device reset
      for(i=0;i<3;i++)
            0x1080          //manual mode, channel 1
}

Here is a screenshot of the SPI transfer:

MISO is the SDO line; MOSI is the SDI line; clock rate is ~350kHz, AREFP is 3.0V, +VA is 3.3V, +VB is +3.3V

If i shift the clock 1/2 period, so that the rising edge of the clock and the rising edge of the data bits are simultaneous, the ADS7952 output word is the channel number and the sample data. Although the channel selected by the ADS792 is not the channel i programmed, the sampled data is correct (i applied 1.5V to channel 8 and GND to all other channels). Here is the screenshot:

Schematic for reference (what you can't see: the NC pins are tied to GND)

I assume i am doing something wrong with the SPI timing, but as far as i can see my timing complies the timing requirements from the datasheet.

So i would appreciate any suggestion that helps me to get it work.

Best regards

Paul Roßmann

 

  • 0
    TI__Guru**** 180791 points

    Hi Paul,

    For the ADS7952, you should be able to run with SPI mode 0 (CPOL = 0, CPHA = 0) as you were in the initial screen shots.  Can you tell me where you were probing (the U7 side of the ADC3_SPI connector block?) and if there is any cabling associated with the interface to the AT91SAM?

  • 0 in reply to Tom Hendrick
    Prodigy 110 points

    Hello Tom,

    as i'm using the AT91SAM9260 evaluation kit and my board with the ADC hardware there are some ~10cm wires and pin headers for the SPI bus and ground connection from the ARM board to my board. On my board there are three ADS7952 connected to the SPI bus (of course each with it's own chip select), and the ADS3_SPI connector block can be used to detach the ADC3 from the bus (now it is not detatched and bridged with jumpers). The board traces from the ADC3_SPI connector to the ADC are <1cm and the traces to the connector where the bus enters my board are <5cm.

    Because it's much more convenient i probe at the pin header of the ARM board now, but i had similar results probing at the ADC3_SPI connector.

    Idea: Maybe i should detach the ADC3 and connect the SPI bus from the ARM direct to the ADCs side of the ADC3_SPI connector block and retry, thereby excluding the other slaves on the bus from accidently interfering the communication.

    Thanks for your input,

    Paul

  • 0 in reply to PaulRoßmann
    TI__Guru**** 180791 points

    Hi Paul -

    Take a look at SCLK versus MOSI/MISO on the processor (master) side and then SCLK versus MOSI/MISO on the ADC (slave) side (as near to the pins as you can in both cases) and try to get a screen shot of each for me - one overall cycle, and one zoomed in showing the SCLK to MOSI/MISO relationship at both the slave and master side.

  • 0 in reply to Tom Hendrick
    Prodigy 110 points

    Hi Tom,

    first i connected the SPI wires from the ARM board directly to the ADC3 thereby detaching all other devices from the bus. After that i took the screenshots, and it looks much better now. Order of screenshots is: slave side complete cycle, slave side zoomed, then master side complete cycle and at last master side zoomed.

     

     

     

    The ADS7952 switches to the desired channel in frame 4 (i would say one framt to late, but that may be relatet to the device reset) and samples the correct data. I'm going to attach the other device to verify that there is the problem.

    Best regards,

    Paul

  • 0 in reply to PaulRoßmann
    Prodigy 110 points

    Hi Tom,

    i found the source of the problem (at least i think i found it):

    if i connect the SPI wires from the ARM board to the SPI bus on my board (and not directly to the ADC3_SPI connector block), there is a lot of ringing and crosstalk going on. If i connect the SPI wires directly there is ringing to, but it is reduced by 1/2. The voltage spikes on the SDI line at the rising edges of the clock are about +-920mV. With 3.3V supply the lower bound of the logic high level voltage with 0,7*3.3V = 2.31V is close to this. With the direct connection the spikes are +- 480mV.

     I assume the reason for this is my board layout. The clock and SDI lines are placed directly next to each other, without any ground plane for shielding (it is my first layout with any fast digital signals, and a quite dense layout too).

    It would be nice if you could confirms my assumtion.

    To continue prototyping with my board i thinksimple rewiring the spi with loose wire should be sufficient.

    Best regards and thanks for your help, i'm going to bed now (00:19 am in Germany now)

    Paul Roßmann

  • 0 in reply to PaulRoßmann
    TI__Guru**** 180791 points

    Gute Nacht Paul,

    Will look into this on our end in the morning.  Thank you for the added details.

  • 0 in reply to Tom Hendrick
    Prodigy 110 points

    Hi Tom,

    i got it running (finaly). After rewiring the SPI with much more distance between SCLK, MOSI and MISO, the crosstalk was reduced to ~400mV. Adding series termination of 100Ohm for the MOSI and SCLK line direct to the AT91SAM9260 EK connector and a better ground connection between the two boards made it working, even up to 22MHz.

    Thanks for the support,

    Paul Roßmann