instruction support

junwon kim

Intellectual 350 points

Other Parts Discussed in Thread: TM4C123GH6PGE

I'm using TM4C123GH6PGE, and CCSv5.

When I executed instruction LDMED, it was executed by LDMIA, in diassembly.

In fact, these two instructions have different meaning.

Is this board doesn't support instruction like LDMED etc?

There wasn't a error when debuging with that instruction.

over 8 years ago

0 Archaeologist over 8 years ago

TI__Guru* 84225 points

I cannot reproduce a case of an LDMED instruction decoding as LDMIA. Could you please provide an example of such an instruction?

If you did not encounter an error while debugging, why does it matter which instruction is used?

0 junwon kim over 8 years ago in reply to Archaeologist

Intellectual 350 points

Thanks for replying.
Just executing insturction 'LDMED sp, {r0, r1, r3} ' , it is decoded as LEMIA.W R13, {r0, r1, r3}.
As I know, it has different meaning in point of place which stack pointer indicates after loading.

In ARMv7-M Architecture Reference manual, I cannot find instruction about LDMED.
Does this instruction is not supported in TM4C123GH6PGE?

0 Archaeologist over 8 years ago in reply to junwon kim

TI__Guru* 84225 points

That device has a Cortex-M4F, and it supports all of the Cortex-M instructions.

What is the document number for the ARMv7-M Architecture Reference Manual that you are using?