Memory map prevented reading of target memory at 0x007D9744

Hi,

1. It's obvious that the adress 0x007D9744 is in invalid range of memory map. There must be some issue in the linker cmd file, but I can't open the link you provide, could you please attach the cmd file directly in the post?

2. No absolute rules to the placement of text section, it's decided by several factors: the size of text section, whether L2 is setup as cache, whether you intend to share the code between multicores and so on.  But in a single core application and there is enough RAM(not cache) space to fit the text section, it will be ok and effective to place it directlty in L2SRAM.

3. Generally, I think we can take the memory located inside the CorePac as internal memory which is refer to L1&L2. Because these memory is running at the same clock domain(but different clock rate) with DSP core and often in higher running frequency than exteranl memroy. And the memory outside CorePac including MSMCRAM, FLASH, EEPROM,DDR3 can be considered as external memory. Just for you to refer and I also can't open the website you point to.

Allen

thank you for your comprehensive reply. i re uploaded the files as you mentioned and they are in turn they appeared in the question

3581.PDSCH.rar

6064.LTE2.rar

0777.6455_dsk_techref.rar

1- the address 0x007D9744 is preserved in the memory map and i don't use it in the .cmd file, so why the EVM uses it ?? and how to make the code shared between 4 cores of the processor

thank you in advance

Hello, it seems the issue is caused by the stack overflow,  you specify the size of stack as 0x80000, but actually it's not enough. So when the program run to modulation() function, it overflows. In order to solve the problem, you should first expand the stack, 0x100000 for example. Then define a new memory class in MEMORY which should be big enough to contain the stack section, so MSMCRAM or DDR3 is available choice, such as:

DDR3:   o = 0x80000000 l = 0x10000000

And place stack ino that class:

.stack      >       DDR3

Then rebuild the project and try again.

Allen

If you want to share the code between 4 cores, a simple way is locate the .text to the shared memory region, for example MSMC or DDR3. The address of these memory is the same for all cores. And place all the other data sections into individual memory space of each core such as local L2 if it is large enough or into the separate and non-overlapping space of MSMC or DDR3.

It seems kind of strange for a stack overflow to jump so far beyond the memory boundary w/o the issue already having being caught, though a stack overflow corrupting other data and this results in the access either by corrupting an existing pointer. 

Either way, I'd look at the dissassembly around the PC when the failure occurs, and the registers, figure out what caused the access to reserved space.  It could be corrupted data do to stack overflow, it could be using an unitialized variable, or something else we're not thinking of.

Best Regards,

Chad

Dear Allen Lee,

first of all, thank you for your reply and sorry for being late due to some issues for that week and i hope you continue with me.

i modified my linker command file to be :

 6036.LTE2.rar

as you recommended but unfortunately it reach to a line which is a simple formula calculations and indicates running for a long time. this line is previous to the point were the program gave the previous error 

line 68 in the main is calling modulation function, line 132 in this function is were the program hanging. i don't know what is going wrong 
would you help me??

and what is wrong with this linker file ??
7506.LTE2.rar

looking forward for your comprehensive respose 

Dear  Chad Courtney 

first of all, thank you for your reply and sorry for being late due to some issues for that week and i hope you continue with me.

i tried to follow the program and trace it i reached to the point where the program is corrupted but i don't know why it is happening.

in the main function line 72 is calling a function mapping which calls a function pilots2 at line 38 and when the program reach line 25 the error appear:
C66xx_0: Call Stack: Cannot unwind further: Cannot read memory at 0x007D975C: memory is not present

appears in the console and  2 variables have the type and value as:
 

R : type Cannot read memory at 0x007D9744: memory is not present  value  Error: Cannot read memory at 0x007D9744: memory is not present

and 

allocation1: type Cannot read memory at 0x007D9740: memory is not present value Error: Cannot read memory at 0x007D9740: memory is not present

looking forward for your comprehensive response 

Hello, I can go through the program with you cmd file without any problem. Did you make any other modification on the project? Maybe it's better to attach your whole project directory here.

Dear Allen, thank you for your reply

i really don't understand what is going with the kit 

first i tried the following project with the previous linker command file as Texas Instrument Simulator as a target configuration. it took very long time for running but finally  

8484.modandmap.rar

finished. second i tried to change the target platform to be emulator with the same linker file but unfortunately the error described before occurred so i changed the linker command file as you suggested then i first checked it as emulator and when i add the GEL files some variables have the following

R : type Cannot read memory at 0x007D9744: memory is not present  value  Error: Cannot read memory at 0x007D9744: memory is not present

and this is occurs randomly , thus some cores have this variables and some not and it may change from one trial to another. when i run it reach to a formula and takes a long time then the following appears on the console

No source available for "0x10800104" 

when i try the same linker file with Texas Instrument Simulator as a target configuration, a new tab is opened with the following line:
No source available for "0x800000"  

i tried another smaller project. the following one 

5481.scrambling.rar

it worked well for the first linker file and do the same as the previous project with the modified linker file

what do you think?? 

thank you in advance

Abdalrahman,

Please report the hex value of the cache configuration registers at the following locations in the CorePac you are running:

0x01840000 - L2 Cache Config (L2CFG) 
0x01840020 - L1P Cache Config (L1PCFG)
0x01840040 - L1D Cache Config (L1DCFG)

Your linker cmd file allocates all of L1D and L1P as being available to the linker, but these are usually both set to 100% cache. Neither is being used so these are not causing problems, but it is a potential for a problem and those two lines should at least be commented out of the MEMORY section of your linker cmd file or edited to match your cache configuration, unless you have the L1D and L1P caches turned off.

It is common for the GEL file to allocate some of L2 as cache, If this is the case, then the linker command file needs to be adjusted to reflect that. If too much is being allocated to cache, then there may be a conflict between what the linker allocates and what the cache uses.

Regards,
RandyP

Hi Abdalrahman,

I also agree with RandyP's comments. Your project is running normally on my side. So the only thing I can suspect is the target configuration. 

Simulator is always slower than emulator, so it's normal for running of more time.  In emulator mode, you should specify the proper GEL for the target configuration. The default one for EVM6670 is under C:\Texas Instruments\ccsv5\ccs_base_5.0.3.00023\emulation\boards\evmc6670l\gel. Did you attach it correctly? And if so, please check the Set_DSP_Cache() function inside and confirm the CACHE_L2CFG is already set to 0.

Allen

Dear Randyp,
thank you for your reply and i want you to continue,
i don't know how to report the hex value of the cache configuration registers in the CorePac morever i don't know which corepack i work with i choose all cores when i enter the debug mode. this is first

secondly, the cache configurations in the first linker file i uploaded is the same as the second i only added the DDR and allocated the .stack to it and the same GEL files, so why the problem occured in the second file not in the first ???!!

looking forward for your answer

thank you in advance

Dear Allen,

i am so grateful for your response

BUT what may be wrong with my target configuration knowing that i used the kit to emulate other exambles and where to get the proper GEL files for my application . i used the GEL files which come with the kit

looking forward for your response and thank you in advance

Abdalrahman,

To inspect the value of any memory mapped register, select the appropriate CorePac in the Debug Window to put the other CCS windows in context. Then view the value at the selected addresses in the Memory Browser of in an Expressions window.

You need to go to the TI Wiki Pages and find the CCSv5 GSG (Getting Started Guide). Go through the tutorials. For better training, find the 1.5 day SYS/BIOS workshop which also has video training available.

Regards,
RandyP