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OMAPL138 SPI0 interface wrong clock freq?

Henrik Abrahamsson
Intellectual 300 points
Other Parts Discussed in Thread: OMAPL138, OMAP-L138, ADS7846

Hi,

I have an OMAPL138 based custom board that runs Linux (DaVinci-PSP-SDK-03.20.00.11) on the ARM processor . I am trying to use the SPI0 interface from Linux to communicate whith a FPGA device and a flash memory but I am not able to make it work properly. In my board file in Linux kernel I specify a max_speed_hz = 30 000 000 for my spi0 devices but when I measure on the SPI0_CLK pin with oscilliscope it looks like the SPI0 clock has a 75 MHz frequency.

I have confirmed that the PRESCALE bits in the SPIFMT register is correct. PRESCALE = 4 which means that SPI clock frequency = SPI module clock / (PRESCALE +1) = 150 Mhz / 5 = 30 MHz, i.e. the same as I specified in my board file. So why do I get a 75MHz output on SPI0_CLK pin?

I also have a flash memory connected on the SPI1 interface but that interface works perfect and the measured clock frequency output is the same as specified in board file. So there must be something strange with my settings for SPI0 but I can not figure out what's wrong.

I appreciate any suggestions on what I should check or do to make it work.

 

Thank you,

Henrik Abrahamsson

  • 0
    TI__Mastermind 27585 points

    Can you print out the PLLC0 registers (0x01C11000 - 0x01C111F4h) as well as the SPI1 configuration registers when you see the 75 MHz output? Thanks

    Jeff

  • 0 in reply to jc-ti
    Intellectual 300 points

    Hi Jef,

    I have attached the register settings for PLLC0 registers, SPI0 and SPI1. SPI1 works fine but SPI0 has a 75MHz output clock.

    // Henrik Abrahamsson

    Register settings.pdf
  • 0 in reply to Henrik Abrahamsson
    TI__Mastermind 27585 points

    According to your register dump:

    SPIDAT1 = 0x003F 0000
    SPIFMT0=0x0
    SPIFMT1=0x0
    SPIFMT2=0x0x00010410
    SPIFMT3=0x0

    Since SPIDAT1 sets DFSEL=0, it is using the PRESCALE of SPIFMT0, which is 0.

    To get the 30MHz SPI clock, either modify SPIDAT1 to use SPIFMT2, or modify SPIFMT0 to use a PRESCALE of 4.

    Jeff

     

  • 0 in reply to jc-ti
    Intellectual 300 points

    Hi Jeff,

    The davinci_spi driver didn't set DFSEL so it always used SPIFMT0 as divider. I changed the driver so it uses SPIFMT2 when using chip select2 (which my fpga deivce does) and now the clock output is correct. Thank you for all your help!

    // Henrik Abrahamsson

  • 0 in reply to jc-ti
    Prodigy 30 points

    hi

    I meet this problem too.

    I use OMAP-L138 and 2.6.33 rc4.I use SPI1 to connect ADS7846,when I test the SPI _CLK I find it always at 75MHz.

     

  • 0 in reply to Henrik Abrahamsson
    Guru 20755 points

    Hello Henrik,

     

    I have some problems using SPI0, I only see change in CLK pin, bit not in CS (I also use CS_2), or SIMO, SOMI. I did not succeed in configuring it in u-boot, nor in CCS (using GEL with added script for SPI0 pinmux). I Also founcd that davinci_spi.c in the u-boot  was fit to be used only with SPI1, so you probably changed it.

    Can you post your pinmux configuration and other changes made for using SPI0 in CCS or u-boot ?

    Thank you!

    Ran 

  • 0 in reply to ranchu
    Intellectual 300 points

    ran shalit said:

    Hello Henrik,

     

    I have some problems using SPI0, I only see change in CLK pin, bit not in CS (I also use CS_2), or SIMO, SOMI. I did not succeed in configuring it in u-boot, nor in CCS (using GEL with added script for SPI0 pinmux). I Also founcd that davinci_spi.c in the u-boot  was fit to be used only with SPI1, so you probably changed it.

    Can you post your pinmux configuration and other changes made for using SPI0 in CCS or u-boot ?

    Thank you!

    Ran 

    Hi Ran,

    Sorry but I do not use the SPI-interface in UBL or U-Boot so I only made it work in Linux.

    // Henrik

  • 0 in reply to Henrik Abrahamsson
    Prodigy 30 points

    Hi

    Just FYI

    You properly know, since your are using PRESCALE = 4

    From SPRUFM4I–March 2011 in Table 26. SPI Data Format Register (SPIFMTn)

    Bit 15-8, prescale.  Note: PRESCALE values less than 2h are not supported.

     

    BUT the default value is 0!!!  

    -Just thinking, what will happen if this register is not configured correctly?

     

    Regards

    Tommy Nielsen

     

  • 0 in reply to jc-ti
    Expert 2750 points

    Jeff,

    I wonder does the actual SPI speed depends also on factors such as:

    1. Code and data section placement:

        for example, for PLL0_SYSCLK2 = 150MHz, PRESCALE = 2, we know the SPI clock should be 50MHz

        but for OMAP L138, I found that

    •     if I place all code in 128KB internal shared RAM and data in DDR2, I can get actual data out frequency of 2MHz;
    •     if I place both all code and data in DDR2, I get actual data out frequency of betweenn 100KHz and 300KHz

     Could you have a look at

    SPI1 only about 2MHz clock rate?

    ?

     

    And to reach the actual 50MHz clock, is EDMA a must?

     

    Paul