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Original question:

ISOW7840: Can i use 5V DC input to ISOW7840 IC and pin 4 and pin 5 of this IC connected as input to a Microcontroller pin...

ISOW7840: ISOW7840 PCB design Isolation requirement for low EMI

Harish Gode
Prodigy 50 points
Part Number: ISOW7840

Hi Koteshwar, 

I am referring the SLLA368B application note for ISOW7840 for Low Emission design. On Page 7 of document it mentions 0.66 mm  creepage distance between two  Isolated GND ( GND1 and GND2) .

1) Can you tell me this 0.66 mm  clearance is ok for 5 KV RMS  isolation requirement. On top layer  i am considering 1KV / mm . So 5mm for 5KV rms requirement.

2) If there is a Via ( which is from 1st layer to 4th layer)   then what should be distance maintained between a track and Via  for isolated GND  in layer 2 ( Inside layer) I am using FR4 material PCB.

3) can you provide any formula for calculation for Isolation inside layers and if there is a Via.

Regards

harish

  • 0
    TI__Guru 52980 points
    Hi Harish,

    Thank you for going through the application note SLLA368B for low emissions design with ISOW7840. Please find below my inputs to the questions you have listed,

    1) Like it is mentioned in the application note, FR4 material has a dielectric strength of about 20kV/mm. FR4 material with a thickness of 0.66mm will be able to support about 13.2kV (= 20kVmm*0.66mm) of isolation voltage. Since ISOW7840 supports about 10kV of peak surge performance, an FR4 material supporting 13.2kV is considered good enough with margin.
    Regarding top and bottom PCB layers, to fully utilize device's isolation performance we recommend you to keep the creepage/clearance of top & bottom layers to be similar or higher than ISOW7840 device itself. Since ISOW7840 has a creepage/clearance of >8mm, it would be great if top & bottom layers also have 8mm spacing between the two sides of isolation barrier.

    2) Since >8mm of creepage/clearance is a requirement through the medium air, the area between the two sides of isolation barrier should be clear all the via and PCB signal traces. As long as the via and signal traces are outside this 8mm space, the isolation performance is unaffected.

    3) You can use the dielectric strength of FR4 material for calculating isolation performance of the FR4 material. Please do keep margins to cover for the variations in FR4 thickness that can occur due to PCB manufacturing process. Thanks.


    Regards,
    Koteshwar Rao