- Ask a related questionWhat is a related question?A related question is a question created from another question. When the related question is created, it will be automatically linked to the original question.
Hello,
I have the question about supply current of SN74AHCT74Q-Q1.
(1)
Our customer use SN74AHCT74Q-Q1 for replacement from TC7WT74FU(toshiba).
Then the supply current is 0.8mA increased from Toshiba device.
We think the reason that the delta Icc specification.
They use Vcc=5V and Vin=3.3V.
Could you please let me know the mechanism of this delta icc?
(2)
Other device has the specification of delta icc(for example, SN74HCT74). But the specification is not same.
Could you please let me know this difference reason?
(3)
Are there any other device which has lower icc specification than Sn74AHCT74Q-Q1.
Best Regards,
Ryuji
Hi Ryiji-san,
Instead of explaining how MOSFETs work, I can give a very quick answer: the datasheet has this measured specifically:
Note that the test conditions show one input at 3.4V, and the measured supply current (maximum) was 1.5mA.
Hi Ryuji-san,
I apologize that I previously didn't have the time to answer your question in full - I was just very busy yesterday. I will try to answer fully today.
CMOS devices use a complementary pair of FETs at each stage of the device, as described here: 
The inputs to most logic devices are just CMOS inverters, usually with this exact circuit:
There will be additional CMOS circuitry beyond this stage, but this is the key to understanding why there is so much current for inputs that are of the wrong voltage.
I assume you are an engineer and know how MOSFETs work in general (if not, this would become a _very_ long post!). Here's a quick reminder sheet I use:
Remember that V_GS controls how much an nFET is turned on, and V_SG controls how much a pFET is turned on. If the input is very close to Vcc, the pFET will be turned off because V_SG = Vcc - Vcc = 0V. Similarly, the nFET will be turned off when the input is 0V because V_GS = 0V - 0V = 0V.
And the following image shows the input characteristics for a typical CMOS input (ideal):
You can see in the top left that when the input is close to 0V, the Mp FET is ON and Mn FET is OFF, which causes very little current to be drawn.
Similarly, when the input is very close to Vcc, Mp is OFF and Mn is ON, which causes very little current to be drawn.
The top and bottom plot are aligned along the x axis such that both show a matching sweep of the input voltage. The red highlighted area close to an input voltage of Vcc/2 shows the expected spike in current due to shoot-through current.
This shoot-through current is caused by both Mp and Mn being turned on at the same time, and the current path is shown here:
Please let me know if I can be of further assistance.
